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Updated MCU core-ids
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@Nightwalker-87
Nightwalker-87 committed Jan 15, 2022
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30 changes: 15 additions & 15 deletions doc/devices_boards.md
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Expand Up @@ -2,7 +2,7 @@

The following devices are supported by the stlink toolset.

## STM32F0 / ARM Cortex M0 / Core-ID: 0x0bb11477 (STM32F0_CORE_ID)
## STM32F0 / ARM Cortex M0

| Chip-ID | Product-Code |
| ------- | ------------------- |
Expand All @@ -19,7 +19,7 @@ The following devices are supported by the stlink toolset.
| 0x442 | STM32F0**9**xxx |


## STM32F1 / ARM Cortex M3 / Core-ID: 0x1ba01477 (STM32F1_CORE_ID)
## STM32F1 / ARM Cortex M3

| Product-Code | Product Line |
| ----------------- | ----------------------- |
Expand All @@ -45,20 +45,20 @@ Tested non-official ST boards [incl. STLINK programmers]:
- HY-STM32 (STM32F103VETx) [v1, v2]
- DecaWave EVB1000 (STM32F105RCTx) [v1, v2]

## STM32F2 / ARM Cortex M3 / Core-ID: 0x2ba01477 (STM32F2_CORE_ID)
## STM32F2 / ARM Cortex M3

| Chip-ID | Product-Code | Product Line |
| ------- | ------------ | ------------- |
| 0x411 | STM32F2yyxx | (all devices) |

## STM32F1 / ARM Cortex M3 / Core-ID: 0x2ba01477 (STM32F1c_CORE_ID)
## STM32F1 Clone / ARM Cortex M3 (Core-ID: 0x2ba01477)

| Product-Code | Chip-ID | STLink<br />Programmer | Boards |
| ------------- | ------- | ---------------------- | ----------------------------------------------------------------------------------------------- |
| CKS32F103C8Tx | 0x410 | v2 | "STM32"-Bluepill ( _**Fake-Marking !**_ )<br />STM32F103C8T6 clone from China Key Systems (CKS) |
| CKS32F103C8Tx | 0x410 | v2 | CKS32-Bluepill (Clone)<br />STM32F103C8T6 clone from China Key Systems (CKS) |

## STM32F3 / ARM Cortex M4F / Core-ID: 0x2ba01477 (STM32F3_CORE_ID)
## STM32F3 / ARM Cortex M4F

| Product-Code | Product Line |
| ----------------- | ------------------------------------------------------------- |
Expand All @@ -85,13 +85,13 @@ Tested non-official ST boards [incl. STLINK programmers]:
| 0x446 | _N/A_ | xD xE | | F302 | F303 | |
| 0x446 | _N/A_ | - | | | | F398 |

## STM32F3 / ARM Cortex M4F / Core-ID: 0x2ba01477 (STM32F3c_CORE_ID)
## STM32F3 Clone / ARM Cortex M4F (Core-ID: 0x2ba01477)

| Product-Code | Chip-ID | STLINK<br />Programmer | Boards |
| ------------ | ------- | ---------------------- | ---------------------------------- |
| GD32F303VGT6 | 0x430 | [v2] | STM32F303 clone from GigaDevice GD |

## STM32F4 / ARM Cortex M4F / Core-ID: 0x2ba01477 (STM32F4_CORE_ID)
## STM32F4 / ARM Cortex M4F

| Chip-ID | Product-Code |
| ------- | ------------------- |
Expand All @@ -112,7 +112,7 @@ Tested non-official ST boards [incl. STLINK programmers]:
| 0x463 | STM32F4**13**xx |
| 0x463 | STM32F4**23**xx |

## STM32F7 / ARM Cortex M7F / Core-ID: 0x5ba02477 (STM32F7_CORE_ID)
## STM32F7 / ARM Cortex M7F

| Chip-ID | Product-Code |
| ------- | --------------- |
Expand All @@ -123,7 +123,7 @@ Tested non-official ST boards [incl. STLINK programmers]:
| 0x451 | STM32F7**6**xxx |
| 0x451 | STM32F7**7**xxx |

## STM32H7 / ARM Cortex M7F / Core-ID: 0x6ba02477 (STM32H7_CORE_ID)
## STM32H7 / ARM Cortex M7F

| Chip-ID | Product-Code |
| ------- | ------------- |
Expand All @@ -132,7 +132,7 @@ Tested non-official ST boards [incl. STLINK programmers]:
| 0x480 | STM32H7**A**x |
| 0x480 | STM32H7**B**x |

## STM32G0 / ARM Cortex M0+ / Core-ID: 0x0bc11477 (STM32G0_CORE_ID)
## STM32G0 / ARM Cortex M0+

| Chip-ID | Product-Code |
| ------- | --------------- |
Expand All @@ -141,7 +141,7 @@ Tested non-official ST boards [incl. STLINK programmers]:
| 0x460 | STM32G0**7**xxx |
| 0x460 | STM32G0**8**xxx |

## STM32G4 / ARM Cortex M4F / Core-ID: 0x2ba01477 (STM32G4_CORE_ID)
## STM32G4 / ARM Cortex M4F

| Chip-ID | Product-Code |
| ------- | --------------- |
Expand All @@ -151,7 +151,7 @@ Tested non-official ST boards [incl. STLINK programmers]:
| 0x469 | STM32G4**8**xxx |
| 0x479 | STM32G4**91**xx |

## STM32L0 / ARM Cortex M0+ / Core-ID: 0x0bc11477 (STM32L0_CORE_ID)
## STM32L0 / ARM Cortex M0+

| Chip-ID | Product-Code |
| ------- | --------------- |
Expand All @@ -164,7 +164,7 @@ Tested non-official ST boards [incl. STLINK programmers]:
| 0x447 | STM32L0**7**xxx |
| 0x447 | STM32L0**8**xxx |

## STM32L1 / ARM Cortex M3 / Core-ID: 0x2ba01477 (STM32L1_CORE_ID)
## STM32L1 / ARM Cortex M3

| Chip-ID | Product-Code |
| ------- | ---------------- |
Expand All @@ -178,7 +178,7 @@ Tested non-official ST boards [incl. STLINK programmers]:
| 0x436 | STM32L1xxx**D** |
| 0x437 | STM32L1xxx**E** |

## STM32L4 / ARM Cortex M4F / Core-ID: 0x2ba01477 (STM32L4_CORE_ID)
## STM32L4 / ARM Cortex M4F

| Chip-ID | Product-Code |
| ------- | --------------- |
Expand All @@ -197,7 +197,7 @@ Tested non-official ST boards [incl. STLINK programmers]:
| 0x471 | STM32L4**P5**xx |
| 0x471 | STM32L4**Q5**xx |

## STM32W / ARM Cortex M3 / Core-ID: 0x2ba01477 (STM32W_CORE_ID)
## STM32W / ARM Cortex M3

| Chip-ID | Product-Code |
| ------- | --------------- |
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33 changes: 21 additions & 12 deletions inc/stm32.h
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Expand Up @@ -7,11 +7,20 @@
#ifndef STM32_H
#define STM32_H

/* Cortex-M core ids */
#define STM32VL_CORE_ID 0x1ba01477
#define STM32F7_CORE_ID 0x5ba02477
#define STM32H7_CORE_ID 0x6ba02477 // STM32H7 SWD ID Code
#define STM32H7_CORE_ID_JTAG 0x6ba00477 // STM32H7 JTAG ID Code (RM0433 p.3065)
/* Cortex-M core ids (CPUTAPID) */
#define STM32_CORE_ID_M3_F2_JTAG 0x0ba00477 // unused // F2 JTAG (RM0033 p.1326)
//#define STM32_CORE_ID_M33_JTAG 0x0ba04477 // unused // L5 JTAG
#define STM32_CORE_ID_M0 0x0bb11477 // unused // F0
#define STM32_CORE_ID_M0P 0x0bc11477 // unused // L0, G0
#define STM32_CORE_ID_M33 0x0be01477 // unused // L5 SWD (RM0351 p.2029)
#define STM32_CORE_ID_M33_JTAG 0x0be02477 // unused // L5 JTAG (RM0438 p.2029)
#define STM32_CORE_ID_M3_F1 0x1ba01477 // F1 (RM0008 p.1092)
#define STM32_CORE_ID_M4F_L4 0x1ba01477 // unused // L4 (RM0351 p.1845)
#define STM32_CORE_ID_M4F_F4 0x2ba01477 // unused // F4 (RM0090 p.1695)
#define STM32_CORE_ID_M4F_F4_JTAG 0x4ba00477 // unused // F4 JTAG (RM090 p.1691)
#define STM32_CORE_ID_M7_F7 0x5ba02477 // F7
#define STM32_CORE_ID_M7_H7 0x6ba02477 // H7
#define STM32_CORE_ID_M7_H7_JTAG 0x6ba00477 // H7 JTAG (RM0433 p.3065)

/* STM32 flash types */
// New flash type definitions must go before STM32_FLASH_TYPE_UNDEFINED
Expand All @@ -22,13 +31,13 @@ enum stm32_flash_type {
STM32_FLASH_TYPE_F1_XL = 2,
STM32_FLASH_TYPE_F2_F4 = 3,
STM32_FLASH_TYPE_F7 = 4,
STM32_FLASH_TYPE_G0 = 5, // 7
STM32_FLASH_TYPE_G4 = 6, // 8
STM32_FLASH_TYPE_H7 = 7, // 10
STM32_FLASH_TYPE_L0_L1 = 8, // 5
STM32_FLASH_TYPE_L4_L4P = 9, // 6
STM32_FLASH_TYPE_L5_U5 = 10, // new
STM32_FLASH_TYPE_WB_WL = 11, // 9
STM32_FLASH_TYPE_G0 = 5,
STM32_FLASH_TYPE_G4 = 6,
STM32_FLASH_TYPE_H7 = 7,
STM32_FLASH_TYPE_L0_L1 = 8,
STM32_FLASH_TYPE_L4_L4P = 9,
STM32_FLASH_TYPE_L5_U5 = 10,
STM32_FLASH_TYPE_WB_WL = 11,
STM32_FLASH_TYPE_UNDEFINED = 12, // max. value exceeded
};

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2 changes: 1 addition & 1 deletion src/common.c
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Expand Up @@ -1514,7 +1514,7 @@ int stlink_chip_id(stlink_t *sl, uint32_t *chip_id) {
*
*/

if ((sl->core_id == STM32H7_CORE_ID || sl->core_id == STM32H7_CORE_ID_JTAG) &&
if ((sl->core_id == STM32_CORE_ID_M7_H7 || sl->core_id == STM32_CORE_ID_M7_H7_JTAG) &&
cpu_id.part == STLINK_REG_CMx_CPUID_PARTNO_CM7) {
// STM32H7 chipid in 0x5c001000 (RM0433 pg3189)
ret = stlink_read_debug32(sl, 0x5c001000, chip_id);
Expand Down
2 changes: 1 addition & 1 deletion src/st-util/gdb-server.c
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Expand Up @@ -559,7 +559,7 @@ char* make_memory_map(stlink_t *sl) {
strcpy(map, memory_map_template_F4);
} else if (sl->chip_id == STM32_CHIPID_STM32_F4_DE) {
strcpy(map, memory_map_template_F4_DE);
} else if (sl->core_id == STM32F7_CORE_ID) {
} else if (sl->core_id == STM32_CORE_ID_M7_F7) {
snprintf(map, sz, memory_map_template_F7,
(unsigned int)sl->sram_size);
} else if (sl->chip_id == STM32_CHIPID_STM32_H74xxx) {
Expand Down
4 changes: 2 additions & 2 deletions src/stlink-lib/flash_loader.c
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Expand Up @@ -245,7 +245,7 @@ int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t*
sl->chip_id == STM32_CHIPID_STM32_L0_CAT2) {
loader_code = loader_code_stm32lx;
loader_size = sizeof(loader_code_stm32lx);
} else if (sl->core_id == STM32VL_CORE_ID ||
} else if (sl->core_id == STM32_CORE_ID_M3_F1 ||
sl->chip_id == STM32_CHIPID_STM32_F1_MD ||
sl->chip_id == STM32_CHIPID_STM32_F1_HD ||
sl->chip_id == STM32_CHIPID_STM32_F1_LD ||
Expand Down Expand Up @@ -278,7 +278,7 @@ int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t*
loader_code_stm32f4_lv, sizeof(loader_code_stm32f4_lv));

if (retval == -1) { return(retval); }
} else if (sl->core_id == STM32F7_CORE_ID ||
} else if (sl->core_id == STM32_CORE_ID_M7_F7 ||
sl->chip_id == STM32_CHIPID_STM32_F7 ||
sl->chip_id == STM32_CHIPID_STM32_F76xxx ||
sl->chip_id == STM32_CHIPID_STM32_F72xxx) {
Expand Down

5 comments on commit c854df5

@Nightwalker-87
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No, they don't have any specific meaning, but I've added them during revision to allow for verification and also resorted the entries.
As the new device-specific chip files work with values this appeared useful for these steps.
That's why they should be kept until all rework on the device specific parametres has completed.
Here we still need to implement various changes in common.c to read from the new chip files.

@gszy
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@gszy gszy commented on c854df5 Jan 16, 2022

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Thanks for pointing out the chip files. IMHO it would be better if the flash type in these files was described as string (for example, "L0_L1"), but it’s probably not urgent.

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Once this has been sorted and the set of parametres is complete we should put this up for discussion again.
I am just thinking where to put this up so that it is not forgotten - maybe we should list it in #1212.
Please place a 🔶 ( : large_orange_diamond : ) before the respective comment as a highlighter. Thanks. 👍

@gszy
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@gszy gszy commented on c854df5 Jan 16, 2022

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That is, should I add a new comment in that issue?

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Yes, that would be great, as you brought up this topic.

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