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Merge pull request #1216 from stlink-org/chipid_cleanup
[refactoring] General maintenance for code structure
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# Chip-ID file for F03x | ||
# Chip-ID file for STM32F03x device | ||
# | ||
chip_id 0x444 | ||
description F03x | ||
flash_type 1 | ||
flash_pagesize 0x400 | ||
sram_size 0x1000 | ||
dev_type STM32F03x | ||
ref_manual_id 0091 | ||
chip_id 0x444 // STM32_CHIPID_F0xx_SMALL | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7cc | ||
flash_pagesize 0x400 // 1 KB | ||
sram_size 0x1000 // 4 KB | ||
bootrom_base 0x1fffec00 | ||
bootrom_size 0xc00 | ||
option_base 0x1ffff800 | ||
option_size 0x10 | ||
bootrom_size 0xc00 // 3 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags none | ||
|
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# Chip-ID file for F04x | ||
# Chip-ID file for STM32F04x device | ||
# | ||
chip_id 0x445 | ||
description F04x | ||
flash_type 1 | ||
flash_pagesize 0x400 | ||
sram_size 0x1800 | ||
dev_type STM32F04x | ||
ref_manual_id 0091 | ||
chip_id 0x445 // STM32_CHIPID_F04 | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7cc | ||
flash_pagesize 0x400 // 1 KB | ||
sram_size 0x1800 // 6 KB | ||
bootrom_base 0x1fffec00 | ||
bootrom_size 0xc00 | ||
option_base 0x1ffff800 | ||
option_size 0x10 | ||
bootrom_size 0xc00 // 3 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags none | ||
|
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# Chip-ID file for F05x | ||
# Chip-ID file for STM32F05x device | ||
# | ||
chip_id 0x440 | ||
description F05x | ||
flash_type 1 | ||
flash_pagesize 0x400 | ||
sram_size 0x2000 | ||
dev_type STM32F05x | ||
ref_manual_id 0091 | ||
chip_id 0x440 // STM32_CHIPID_F0 | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7cc | ||
flash_pagesize 0x400 // 1 KB | ||
sram_size 0x2000 // 8 KB | ||
bootrom_base 0x1fffec00 | ||
bootrom_size 0xc00 | ||
option_base 0x1ffff800 | ||
option_size 0x10 | ||
bootrom_size 0xc00 // 3 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags none | ||
|
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# Chip-ID file for F07x | ||
# Chip-ID file for STM32F07x device | ||
# | ||
chip_id 0x448 | ||
description F07x | ||
flash_type 1 | ||
flash_pagesize 0x800 | ||
sram_size 0x4000 | ||
dev_type STM32F07x | ||
ref_manual_id 0091 | ||
chip_id 0x448 // STM32_CHIPID_F0_CAN | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7cc | ||
flash_pagesize 0x800 // 2 KB | ||
sram_size 0x4000 // 16 KB | ||
bootrom_base 0x1fffc800 | ||
bootrom_size 0x3000 | ||
option_base 0x1ffff800 | ||
option_size 0x10 | ||
bootrom_size 0x3000 // 12 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags none | ||
|
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# Chip-ID file for F09x | ||
# Chip-ID file for STM32F09x device | ||
# | ||
chip_id 0x442 | ||
description F09x | ||
flash_type 1 | ||
flash_pagesize 0x800 | ||
sram_size 0x8000 | ||
dev_type STM32F09x | ||
ref_manual_id 0091 | ||
chip_id 0x442 // STM32_CHIPID_F09x | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7cc | ||
flash_pagesize 0x800 // 2 KB | ||
sram_size 0x8000 // 32 KB | ||
bootrom_base 0x1fffd800 | ||
bootrom_size 0x2000 | ||
option_base 0x1ffff800 | ||
option_size 0x10 | ||
bootrom_size 0x2000 // 8 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags none | ||
|
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# Chip-ID file for F1xx CL | ||
# Chip-ID file for STM32F1xx Connectivity Line device | ||
# | ||
chip_id 0x418 | ||
description F1xx CL | ||
flash_type 1 | ||
flash_pagesize 0x800 | ||
sram_size 0x10000 | ||
dev_type STM32F1xx_CL | ||
ref_manual_id 0008 | ||
chip_id 0x418 // STM32_CHIPID_F1_CONN | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7e0 | ||
flash_pagesize 0x800 // 2 KB | ||
sram_size 0x10000 // 64 KB | ||
bootrom_base 0x1fffb000 | ||
bootrom_size 0x4800 | ||
option_base 0x1ffff800 | ||
option_size 0x10 | ||
bootrom_size 0x4800 // 18 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags swo | ||
|
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# Chip-ID file for STM32F1xx high density device | ||
# | ||
dev_type F1xx_HD | ||
ref_manual_id 0008 | ||
chip_id 0x414 // STM32_CHIPID_F1_HD | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7e0 | ||
flash_pagesize 0x800 // 2 KB | ||
sram_size 0x10000 // 64 KB | ||
bootrom_base 0x1ffff000 | ||
bootrom_size 0x800 // 2 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags swo |
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# Chip-ID file for STM32F1 low density device | ||
# | ||
dev_type STM32F1xx_LD | ||
ref_manual_id 0008 | ||
chip_id 0x412 // STM32_CHIPID_F1_LD | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7e0 | ||
flash_pagesize 0x400 // 1 KB | ||
sram_size 0x2800 // 10 KB | ||
bootrom_base 0x1ffff000 | ||
bootrom_size 0x800 // 2 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags swo |
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# Chip-ID file for STM32F1xx medium density device | ||
# | ||
dev_type STM32F1xx_MD | ||
ref_manual_id 0008 | ||
chip_id 0x410 // STM32_CHIPID_F1_MD | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7e0 | ||
flash_pagesize 0x400 // 1 KB | ||
sram_size 0x5000 // 20 KB | ||
bootrom_base 0x1ffff000 | ||
bootrom_size 0x800 // 2 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags swo |
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# Chip-ID file for STM32F1xx high density Value Line device | ||
# | ||
dev_type STM32F1xx_VL_HD | ||
ref_manual_id 0041 | ||
chip_id 0x428 // STM32_CHIPID_F1_VL_HD | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7e0 | ||
flash_pagesize 0x800 // 2 KB | ||
sram_size 0x8000 // 32 KB | ||
bootrom_base 0x1ffff000 | ||
bootrom_size 0x800 // 2 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags swo |
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# Chip-ID file for STMF1xx Value Line medium & low density device | ||
# | ||
dev_type STM32F1xx_VL_MD_LD | ||
ref_manual_id 0041 | ||
chip_id 0x420 // STM32_CHIPID_F1_VL_MD_LD | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7e0 | ||
flash_pagesize 0x400 // 1 KB | ||
sram_size 0x2000 // 8 KB /* 0x1000 for low density devices */ | ||
bootrom_base 0x1ffff000 | ||
bootrom_size 0x800 // 2 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags swo |
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# Chip-ID file for STM32F1xx XL density device | ||
# | ||
dev_type STM32F1xx_XLD | ||
ref_manual_id 0008 | ||
chip_id 0x430 // STM32_CHIPID_F1_XLD | ||
flash_type F1_XL | ||
flash_size_reg 0x1ffff7e0 | ||
flash_pagesize 0x800 // 2 KB | ||
sram_size 0x18000 // 96 KB | ||
bootrom_base 0x1fffe000 | ||
bootrom_size 0x1800 // 6 KB | ||
option_base 0x0 | ||
option_size 0x0 | ||
flags swo |
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# Chip-ID file for F2xx | ||
# Chip-ID file for STM32F2xx device | ||
# | ||
chip_id 0x411 | ||
description F2xx | ||
flash_type 3 | ||
flash_pagesize 0x20000 | ||
sram_size 0x20000 | ||
dev_type STM32F2xx | ||
ref_manual_id 0033 | ||
chip_id 0x411 // STM32_CHIPID_F2 | ||
flash_type F2_F4 | ||
flash_size_reg 0x1fff7a22 | ||
flash_pagesize 0x20000 // 128 KB | ||
sram_size 0x20000 // 128 KB | ||
bootrom_base 0x1fff0000 | ||
bootrom_size 0x7800 | ||
option_base 0x1fffc000 | ||
option_size 0x4 | ||
bootrom_size 0x7800 // 30 KB | ||
option_base 0x1fffc000 // STM32_F2_OPTION_BYTES_BASE | ||
option_size 0x4 // 4 B | ||
flags swo | ||
|
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# Chip-ID file for F301/F302/F318 | ||
# Chip-ID file for STM32F3xx device (F301x6/8, F302x6x8, F318x8) | ||
# | ||
chip_id 0x439 | ||
description F301/F302/F318 | ||
flash_type 1 | ||
flash_pagesize 0x800 | ||
sram_size 0xa000 | ||
dev_type STM32F301_F302_F318 | ||
ref_manual_id 0365 // also RM0366 | ||
chip_id 0x439 // STM32_CHIPID_F3xx_SMALL | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7cc | ||
flash_pagesize 0x800 // 2 KB | ||
sram_size 0xa000 // 40 KB | ||
bootrom_base 0x1fffd800 | ||
bootrom_size 0x2000 | ||
option_base 0x1ffff800 | ||
option_size 0x10 | ||
bootrom_size 0x2000 // 8 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags swo | ||
|
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# Chip-ID file for F302/F303/F358 | ||
# Chip-ID file for STM32F3xx device (F302xBxC, F303xB/C, F358) | ||
# | ||
chip_id 0x422 | ||
description F302/F303/F358 | ||
flash_type 1 | ||
flash_pagesize 0x800 | ||
sram_size 0xa000 | ||
dev_type STM32F302_F303_358 | ||
ref_manual_id 0365 // also RM0316 | ||
chip_id 0x422 // STM32_CHIPID_F3 | ||
flash_type F0_F1_F3 | ||
flash_size_reg 0x1ffff7cc | ||
flash_pagesize 0x800 // 2 KB | ||
sram_size 0xa000 // 40 KB | ||
bootrom_base 0x1ffff000 | ||
bootrom_size 0x800 | ||
option_base 0x1ffff800 | ||
option_size 0x10 | ||
bootrom_size 0x800 // 2 KB | ||
option_base 0x1ffff800 // STM32_F0_OPTION_BYTES_BASE | ||
option_size 0x10 // 16 B | ||
flags swo | ||
|
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