initial l5 support #1247
initial l5 support #1247
Conversation
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I'm having trouble getting the flash to erase. |
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You can also add page size reduction if DBANK (for 512K flash device and DB256K for 256K) is used. Example ( Lines 280 to 287 in 951859c And small fix page erase code } else if (sl->flash_type == STM32_FLASH_TYPE_L5_U5) {
uint32_t flash_page;
stlink_read_debug32(sl, STM32L5_FLASH_NSCR, &val);
if (sl->flash_pgsz == 0x800 && offset >= sl->flash_size/2) {
flash_page = (flashaddr - STM32_FLASH_BASE - sl->flash_size/2) /
(uint32_t)(sl->flash_pgsz));
// set bank 2
val |= (1 << STM32L5_FLASH_NSCR_NSBKER);
} else {
flash_page = (flashaddr - STM32_FLASH_BASE) /
(uint32_t)(sl->flash_pgsz));
// clear bank selection / set bank 1
val &= ~(1 << STM32L5_FLASH_NSCR_NSBKER);
}
// sec 6.9.9
val &= ~(0x7F << 3);
val |= ((flash_page & 0x7F) << 3) | (1 << STM32L5_FLASH_NSCR_NSPER);
stlink_write_debug32(sl, STM32L5_FLASH_NSCR, val);
} |
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@Evidlo RM0438 pg. 183 have note: I would add the following code to the start of the #define STM32L5_PWR_CR1 0x40007000
#define STM32L5_PWR_CR1_VOS 9 /* Voltage scaling range selection */
...
if (sl->flash_type == STM32_FLASH_TYPE_L5_U5) {
// Set the voltage scaling range to the range 0 to perform flash operations
// RM0438 pg. 183
uint32_t mask = (0x3 << STM32L5_PWR_CR1_VOS);
stlink_read_debug32(sl, STM32L5_PWR_CR1, &val);
if (val & mask) {
val &= ~mask;
stlink_write_debug32(sl, STM32L5_PWR_CR1, val);
}
} |
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Why bother reading the value of the |
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@Evidlo You are right. It looks somehow without strong logic. It is necessary to write the condition differently (I made a mistake, sorry) so the idea becomes clear: ...
if ((val & mask) > (0x1 << STM32L5_PWR_CR1_VOS)) {
...I wanted to make as few changes to the system as possible. ps Have you checked flash the firmware? Did it work? |
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@Evidlo: Please correct the detected errors. Can we also draw this to a close? |
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I've made the changes, but erasing still doesn't work and there are nonzero values in the flash: |
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@Evidlo: Much better now, but some issue on macos remains as can be seen below. |
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@Evidlo I seem to have found the problem. Can you fix and try flash? |
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@Ant-ON, I've made the changes, but I'm getting an identical error message. Also an unrelated problem is that the --reset argumentreset command |
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@Ant-ON If you'd like it, I can also give you guest access to a machine that has the board connected if you give me your ssh pubkey. |
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@Evidlo What is the current state here? Is there any reasonable perspective to draw this topic to a close? |
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@Nightwalker-87 Flashing is still not working. |
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@Ant-ON Any additional ideas for how to debug this? |
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@Evidlo For starters, I think it's worth checking the memory erasing process. To do this, we will erase the memory and read its content: If the erasing process works correctly, then the |
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@Evidlo To fix the reset after the flashing, you need to change the reset code in the src/st-flash/flash.c file to if (o.reset) {
stlink_reset(sl, RESET_AUTO);
stlink_run(sl, RUN_NORMAL);
} |
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This attempt failed to come to an end within a reasonable timespan. |
Nightwalker-87
modified the milestones:
v1.7.1,
Declined or withdrawn contributions & issues
Made more progress. I looked for anywhere
STM32_FLASH_TYPE_G4was defined and made an equivalent section forSTM32_FLASH_TYPE_L5. I crossed referenced all the G0/G4 definitions instm32flash.hand the associated reference manual and found equivalent values in the L5 manual. I wasn't able to find where the value forSTM32Gx_FLASH_SR_ERROR_MASKwas taken from in the reference manual, so I just used the same value for L5.Most of the registers/offsets in the reference manual are prefixed with "NS" (non-secure), which I've followed with my variable names. I don't know if other STM32's distinguish NS vs PD addresses in this way, but I can remove the NS prefix if we want to keep a simple naming convention.