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Support stm32f7x7x #436

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merged 3 commits into from
Jun 18, 2016
Merged

Support stm32f7x7x #436

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3daa3f1
Initial support for STM32F7x7x, for nucleo-144, STM32F767ZI issue #433
xor-gate Jun 18, 2016
dfeb5a4
flash_loader.c: Add STLINK_CHIPID_STM32_F7XXXX
xor-gate Jun 18, 2016
5a06869
Add flash loader core id and chipid for STM32F767ZI with nucleo-144
xor-gate Jun 18, 2016
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1 change: 1 addition & 0 deletions include/stlink.h
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Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,7 @@ extern "C" {
/* cortex core ids */
// TODO clean this up...
#define STM32VL_CORE_ID 0x1ba01477
#define STM32F7_CORE_ID 0x5ba02477

// Constant STM32 memory map figures
#define STM32_FLASH_BASE 0x08000000
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1 change: 1 addition & 0 deletions include/stlink/chipid.h
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Expand Up @@ -52,6 +52,7 @@ enum stlink_stm32_chipids {
STLINK_CHIPID_STM32_L0_CAT5 = 0x447,
STLINK_CHIPID_STM32_F0_CAN = 0x448,
STLINK_CHIPID_STM32_F7 = 0x449,
STLINK_CHIPID_STM32_F7XXXX = 0x451,
STLINK_CHIPID_STM32_F410 = 0x458
};

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11 changes: 11 additions & 0 deletions src/chipid.c
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Expand Up @@ -2,6 +2,17 @@
#include "stlink/chipid.h"

static const struct stlink_chipid_params devices[] = {
{
//RM0410 document was used to find these paramaters
.chip_id = STLINK_CHIPID_STM32_F7XXXX,
.description = "F76xxx device",
.flash_type = STLINK_FLASH_TYPE_F4,
.flash_size_reg = 0x1ff0f442, // section 45.2
.flash_pagesize = 0x800, // No flash pages
.sram_size = 0x5C000, // "SRAM" byte size in hex from
.bootrom_base = 0x00200000, //! "System memory" starting address from
.bootrom_size = 0xEDC0 //! @todo "System memory" byte size in hex from
},
{
//RM0385 and DS10916 document was used to find these paramaters
.chip_id = STLINK_CHIPID_STM32_F7,
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8 changes: 5 additions & 3 deletions src/flash_loader.c
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Expand Up @@ -202,7 +202,7 @@ int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t*
|| sl->chip_id == STLINK_CHIPID_STM32_L0 || sl->chip_id == STLINK_CHIPID_STM32_L0_CAT5 || sl->chip_id == STLINK_CHIPID_STM32_L0_CAT2) { /* stm32l */
loader_code = loader_code_stm32l;
loader_size = sizeof(loader_code_stm32l);
} else if (sl->core_id == STM32VL_CORE_ID
} else if (sl->core_id == STM32VL_CORE_ID
|| sl->chip_id == STLINK_CHIPID_STM32_F3
|| sl->chip_id == STLINK_CHIPID_STM32_F3_SMALL
|| sl->chip_id == STLINK_CHIPID_STM32_F303_HIGH
Expand Down Expand Up @@ -231,7 +231,9 @@ int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t*
loader_code = loader_code_stm32f4_lv;
loader_size = sizeof(loader_code_stm32f4_lv);
}
} else if (sl->chip_id == STLINK_CHIPID_STM32_F7){
} else if (sl->core_id == STM32F7_CORE_ID ||
sl->chip_id == STLINK_CHIPID_STM32_F7 ||
sl->chip_id == STLINK_CHIPID_STM32_F7XXXX) {
loader_code = loader_code_stm32f7;
loader_size = sizeof(loader_code_stm32f7);
} else if (sl->chip_id == STLINK_CHIPID_STM32_F0 || sl->chip_id == STLINK_CHIPID_STM32_F04 || sl->chip_id == STLINK_CHIPID_STM32_F0_CAN || sl->chip_id == STLINK_CHIPID_STM32_F0_SMALL || sl->chip_id == STLINK_CHIPID_STM32_F09X) {
Expand All @@ -241,7 +243,7 @@ int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t*
loader_code = loader_code_stm32l4;
loader_size = sizeof(loader_code_stm32l4);
} else {
ELOG("unknown coreid, not sure what flash loader to use, aborting!: %x\n", sl->core_id);
ELOG("unknown coreid, not sure what flash loader to use, aborting! coreid: %x, chipid: %x\n", sl->core_id, sl->chip_id);
return -1;
}

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