f1 xl should probably merged back into f0, with dual bank bit set.

give l0/l1 some love - l0/l1 are a bit specific regarding keys,
bits, and lock registers.

Also make handling of f0/f1 explicit: ultimate goal is to have some
sanity check and clear codepath in that code in case some new target
is added - and that the whole code uses these helpers.

some work should be done to refactor a bit the flash register mapping
based on family, but not yet.

lo lock

1) no need to unlock option flash to read it.

"The option byte are always read-accessible and write-protected by default."

current device specific option read code now only differs from generic read code
by reading option bytes in the flash option byte register instead of option base.

2) f4 and f2 have similar registers : use the same write code, with flash/option lock
helpers. add flash busy wait and relock at end of access.

3) add f446 option info to chip id

use generic unlock for l4, rename l496 to l4x, add wait flash busy,
complete chip id for l476 (and other)

merge l0/l1, code is the same except flash base, add wait states and relock

should only happen currently after adding a new flash family.

now that all flash family methods are aligned, refactor
main method to avoid duplicated lock/unlock, add info traces, and
map methods based on familly instead of a small subset of selected
devices.

nb1: f0/f1 support is still missing

nb2: option read/write is still conditioned by presence of option_base
and option_size in chipid.c, but adding more chips should only be
a matter of adding these two informations.