Fix SDIO hardware flow control errata

[chemicstry]

Using SDIO above 12 MHz causes clock glitches, which result in CRC errors (at least in embassy-stm32). In this HAL, the CRC error is not caught and write silently fails without changing any bytes on SD card.

Section from STM32F42xx and STM32F43xx Errata sheet:

2.13.1 SDIO HW flow control

Description
When enabling the HW flow control by setting bit 14 of the SDIO_CLKCR register to ‘1’,
glitches can occur on the SDIOCLK output clock resulting in wrong data to be written into
the SD/MMC card or into the SDIO device. As a consequence, a CRC error will be reported
to the SD/SDIO MMC host interface (DCRCFAIL bit set to ‘1’ in SDIO_STA register).

Workaround
None.

Note: Do not use the HW flow control. Overrun errors (Rx mode) and FIFO underrun (Tx mode)
should be managed by the application software.

AFAIK, this affects all SDIOv1 peripherals including the F1 family, and possibly others.

I'm not sure about the CRC error not getting caught, but this PR at least fixes the chip errata.

[burrbull]

please, add errata link inside PR

[chemicstry]

F42x/F43x: https://www.st.com/resource/en/errata_sheet/es0206-stm32f427437-and-stm32f429439-line-limitations-stmicroelectronics.pdf
F40x/F41x: https://www.st.com/resource/en/errata_sheet/es0182-stm32f405407xx-and-stm32f415417xx-device-limitations-stmicroelectronics.pdf

[burrbull]

Thanks
bors r+

[bors]

Build succeeded:

• ci (stm32f401, stable)
• ci (stm32f405, stable)
• ci (stm32f407, stable)
• ci (stm32f410, stable)
• ci (stm32f411, stable)
• ci (stm32f412, stable)
• ci (stm32f413, stable)
• ci (stm32f415, stable)
• ci (stm32f417, stable)
• ci (stm32f423, stable)
• ci (stm32f427, stable)
• ci (stm32f429, stable)
• ci (stm32f437, stable)
• ci (stm32f439, stable)
• ci (stm32f446, stable)
• ci (stm32f469, stable)
• ci (stm32f479, stable)
• Rustfmt