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[L5] new system cortex M33 Device Peripheral Access Layer
Signed-off-by: Francois Ramu <francois.ramu@st.com>
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| /** | ||
| ****************************************************************************** | ||
| * @file system_stm32l5xx_ns.c | ||
| * @author MCD Application Team | ||
| * @brief CMSIS Cortex-M33 Device Peripheral Access Layer System Source File | ||
| * to be used in non-secure application when the system implements | ||
| * the TrustZone-M security. | ||
| * | ||
| * This file provides two functions and one global variable to be called from | ||
| * user application: | ||
| * - SystemInit(): This function is called at non-secure startup before | ||
| * branch to non-secure main program. | ||
| * This call is made inside the "startup_stm32l5xx.s" file. | ||
| * | ||
| * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used | ||
| * by the user application to setup the SysTick | ||
| * timer or configure other parameters. | ||
| * | ||
| * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must | ||
| * be called whenever the core clock is changed | ||
| * during program execution. | ||
| * | ||
| * After each device reset the MSI (4 MHz) is used as system clock source. | ||
| * Then SystemInit() function is called, in "startup_stm32l5xx.s" file, to | ||
| * configure the system clock before to branch to main secure program. | ||
| * Later, when non-secure SystemInit() function is called, in "startup_stm32l5xx.s" | ||
| * file, the system clock may have been updated from reset value by the main | ||
| * secure program. | ||
| * | ||
| ****************************************************************************** | ||
| * @attention | ||
| * | ||
| * <h2><center>© Copyright (c) 2019 STMicroelectronics. | ||
| * All rights reserved.</center></h2> | ||
| * | ||
| * This software component is licensed by ST under Apache License, Version 2.0, | ||
| * the "License"; You may not use this file except in compliance with the | ||
| * License. You may obtain a copy of the License at: | ||
| * opensource.org/licenses/Apache-2.0 | ||
| * | ||
| ****************************************************************************** | ||
| */ | ||
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| /** @addtogroup CMSIS | ||
| * @{ | ||
| */ | ||
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| /** @addtogroup STM32L5xx_System | ||
| * @{ | ||
| */ | ||
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| /** @addtogroup STM32L5xx_System_Private_Includes | ||
| * @{ | ||
| */ | ||
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| #include "stm32l5xx.h" | ||
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| /** | ||
| * @} | ||
| */ | ||
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| /** @addtogroup STM32L5xx_System_Private_TypesDefinitions | ||
| * @{ | ||
| */ | ||
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| /** | ||
| * @} | ||
| */ | ||
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| /** @addtogroup STM32L5xx_System_Private_Defines | ||
| * @{ | ||
| */ | ||
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| #if !defined (HSE_VALUE) | ||
| #define HSE_VALUE 16000000U /*!< Value of the External oscillator in Hz */ | ||
| #endif /* HSE_VALUE */ | ||
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| #if !defined (MSI_VALUE) | ||
| #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ | ||
| #endif /* MSI_VALUE */ | ||
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| #if !defined (HSI_VALUE) | ||
| #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ | ||
| #endif /* HSI_VALUE */ | ||
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| /* Note: Following vector table addresses must be defined in line with linker | ||
| configuration. */ | ||
| /*!< Uncomment the following line if you need to relocate the vector table | ||
| anywhere in Flash or Sram, else the vector table is kept at the automatic | ||
| remap of boot address selected */ | ||
| /* #define USER_VECT_TAB_ADDRESS */ | ||
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| #if defined(USER_VECT_TAB_ADDRESS) | ||
| /*!< Uncomment the following line if you need to relocate your vector Table | ||
| in Sram else user remap will be done in Flash. */ | ||
| /* #define VECT_TAB_SRAM */ | ||
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| #if defined(VECT_TAB_SRAM) | ||
| #define VECT_TAB_BASE_ADDRESS SRAM1_BASE_NS /*!< Vector Table base address field. | ||
| This value must be a multiple of 0x200. */ | ||
| #define VECT_TAB_OFFSET 0x00018000U /*!< Vector Table base offset field. | ||
| This value must be a multiple of 0x200. */ | ||
| #else | ||
| #define VECT_TAB_BASE_ADDRESS FLASH_BASE_NS /*!< Vector Table base address field. | ||
| This value must be a multiple of 0x200. */ | ||
| #define VECT_TAB_OFFSET 0x00040000U /*!< Vector Table base offset field. | ||
| This value must be a multiple of 0x200. */ | ||
| #endif /* VECT_TAB_SRAM */ | ||
| #endif /* USER_VECT_TAB_ADDRESS */ | ||
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| /******************************************************************************/ | ||
| /** | ||
| * @} | ||
| */ | ||
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| /** @addtogroup STM32L5xx_System_Private_Macros | ||
| * @{ | ||
| */ | ||
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| /** | ||
| * @} | ||
| */ | ||
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| /** @addtogroup STM32L5xx_System_Private_Variables | ||
| * @{ | ||
| */ | ||
| /* The SystemCoreClock variable is updated in three ways: | ||
| 1) by calling CMSIS function SystemCoreClockUpdate() | ||
| 2) by calling HAL API function HAL_RCC_GetHCLKFreq() | ||
| 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency | ||
| Note: If you use this function to configure the system clock; then there | ||
| is no need to call the 2 first functions listed above, since SystemCoreClock | ||
| variable is updated automatically. | ||
| */ | ||
| uint32_t SystemCoreClock = 4000000U; | ||
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| const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; | ||
| const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; | ||
| const uint32_t MSIRangeTable[16] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ | ||
| 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U, \ | ||
| 0U, 0U, 0U, 0U}; /* MISRAC-2012: 0U for unexpected value */ | ||
| /** | ||
| * @} | ||
| */ | ||
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| /** @addtogroup STM32L5xx_System_Private_FunctionPrototypes | ||
| * @{ | ||
| */ | ||
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| /** | ||
| * @} | ||
| */ | ||
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| /** @addtogroup STM32L5xx_System_Private_Functions | ||
| * @{ | ||
| */ | ||
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| /** | ||
| * @brief Setup the microcontroller system. | ||
| * @retval None | ||
| */ | ||
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| void SystemInit(void) | ||
| { | ||
| /* Vector table location and FPU setup done by secure application */ | ||
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| /* Configure the Vector Table location -------------------------------------*/ | ||
| #if defined(USER_VECT_TAB_ADDRESS) | ||
| SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; | ||
| #endif | ||
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| /* Non-secure main application shall call SystemCoreClockUpdate() to update */ | ||
| /* the SystemCoreClock variable to insure non-secure application relies on */ | ||
| /* the initial clock reference set by secure application. */ | ||
| } | ||
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| /** | ||
| * @brief Update SystemCoreClock variable according to Clock Register Values. | ||
| * The SystemCoreClock variable contains the core clock (HCLK), it can | ||
| * be used by the user application to setup the SysTick timer or configure | ||
| * other parameters. | ||
| * | ||
| * @note From the non-secure application, the SystemCoreClock value is | ||
| * retrieved from the secure domain via a Non-Secure Callable function | ||
| * since the RCC peripheral may be protected with security attributes | ||
| * that prevent to compute the SystemCoreClock variable from the RCC | ||
| * peripheral registers. | ||
| * | ||
| * @note Each time the core clock (HCLK) changes, this function must be called | ||
| * to update SystemCoreClock variable value. Otherwise, any configuration | ||
| * based on this variable will be incorrect. | ||
| * | ||
| * @note - The system frequency computed by this function is not the real | ||
| * frequency in the chip. It is calculated based on the predefined | ||
| * constant and the selected clock source: | ||
| * | ||
| * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) | ||
| * | ||
| * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) | ||
| * | ||
| * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) | ||
| * | ||
| * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) | ||
| * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. | ||
| * | ||
| * (*) MSI_VALUE is a constant defined in stm32l5xx_hal.h file (default value | ||
| * 4 MHz) but the real value may vary depending on the variations | ||
| * in voltage and temperature. | ||
| * | ||
| * (**) HSI_VALUE is a constant defined in stm32l5xx_hal.h file (default value | ||
| * 16 MHz) but the real value may vary depending on the variations | ||
| * in voltage and temperature. | ||
| * | ||
| * (***) HSE_VALUE is a constant defined in stm32l5xx_hal.h file (default value | ||
| * 8 MHz), user has to ensure that HSE_VALUE is same as the real | ||
| * frequency of the crystal used. Otherwise, this function may | ||
| * have wrong result. | ||
| * | ||
| * - The result of this function could be not correct when using fractional | ||
| * value for HSE crystal. | ||
| * | ||
| * @retval None | ||
| */ | ||
| void SystemCoreClockUpdate(void) | ||
| { | ||
| /* Get the SystemCoreClock value from the secure domain */ | ||
| SystemCoreClock = SECURE_SystemCoreClockUpdate(); | ||
| } | ||
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| /** | ||
| * @} | ||
| */ | ||
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| /** | ||
| * @} | ||
| */ | ||
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| /** | ||
| * @} | ||
| */ | ||
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| /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |