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add new stm32 nucleo l552ze board #1256

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Commits on Dec 11, 2020

  1. [L5] Update STM32L5xx HAL Drivers to v1.0.3

    Included in STM32CubeL5 FW v1.3.1
    
    Signed-off-by: Francois Ramu <francois.ramu@st.com>
    FRASTM committed Dec 11, 2020
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  2. [L5] Update STM32L5xx CMSIS Drivers to v1.0.3

    Included in STM32CubeL5 FW v1.3.1
    
    Signed-off-by: Francois Ramu <francois.ramu@st.com>
    FRASTM committed Dec 11, 2020
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  3. [L5] Update wrapped files

    Signed-off-by: Francois Ramu <francois.ramu@st.com>
    FRASTM committed Dec 11, 2020
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  4. [L5] new HAL configuration and default config

    Signed-off-by: Francois Ramu <francois.ramu@st.com>
    FRASTM committed Dec 11, 2020
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  5. [L5] new system cortex M33 Device Peripheral Access Layer

    Signed-off-by: Francois Ramu <francois.ramu@st.com>
    FRASTM committed Dec 11, 2020
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Commits on Dec 16, 2020

  1. Add support of NUCLEO_L552ZE_Q variant

    Signed-off-by: Francois Ramu <francois.ramu@st.com>
    FRASTM committed Dec 16, 2020
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  2. Add new node name for NUCLEO_L552ZE-Q

    nucleo144 board
    
    Signed-off-by: Francois Ramu <francois.ramu@st.com>
    FRASTM committed Dec 16, 2020
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  3. Support new board NUCLEO_L552ZE-Q

    Signed-off-by: Francois Ramu <francois.ramu@st.com>
    FRASTM committed Dec 16, 2020
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  4. Library EEPROM supports the stm32L552 soc device

    Similar to the stm32L4 serie
    
    Signed-off-by: Francois Ramu <francois.ramu@st.com>
    FRASTM committed Dec 16, 2020
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  5. Set the Vddio2 Independent I/Os supply for the stm32L5xx soc.

    This bit is mandatory to use PG[15:2]. Especiually for LPUART1 TxRx pins.
    This bit of the PWR CR2 is used to validate the V DDIO2 supply for
    electrical and logical isolation purpose.
    
    Signed-off-by: Francois Ramu <francois.ramu@st.com>
    FRASTM committed Dec 16, 2020
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