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Generic L431C(B-C)(T-U) Variant #2427

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merged 7 commits into from
Jul 15, 2024
Merged

Generic L431C(B-C)(T-U) Variant #2427

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f89c47f
added generic L431C(B-C)(T-U) variant
jordancormack Jul 9, 2024
ceb925a
changed entries to alphabetical order
jordancormack Jul 9, 2024
cd8c68a
added release number
jordancormack Jul 9, 2024
b5a5d30
adjusted formatting
jordancormack Jul 9, 2024
3ec1595
adjusted RAM2 address
jordancormack Jul 9, 2024
a13259d
Update variants/STM32L4xx/L431C(B-C)(T-U)/ldscript.ld
fpistm Jul 9, 2024
18df7f3
Update variants/STM32L4xx/L431C(B-C)(T-U)/generic_clock.c
fpistm Jul 9, 2024
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2 changes: 1 addition & 1 deletion README.md
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Original file line number Diff line number Diff line change
Expand Up @@ -676,7 +676,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| Status | Device(s) | Name | Release | Notes |
| :----: | :-------: | ---- | :-----: | :---- |
| :green_heart: | STM32L412K8<br>STM32L412KB<br>STM32L422KB | Generic Board | *2.0.0* | |
| :yellow_heart: | STM32L431CB<br>STM32L431CC | Generic Board | | |
| :yellow_heart: | STM32L431CB<br>STM32L431CC | Generic Board | **2.8.1** | |
| :green_heart: | STM32L431RB<br>STM32L431RC | Generic Board | *2.3.0* | |
| :green_heart: | STM32L432KB<br>STM32L432KC<br>STM32L442KC | Generic Board | *2.0.0* | |
| :green_heart: | STM32L433CBT<br>STM32L433CCT | Generic Board | *2.1.0* | |
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18 changes: 9 additions & 9 deletions boards.txt
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Expand Up @@ -10804,15 +10804,6 @@ GenL4.menu.pnum.GENERIC_L431CBTX.build.product_line=STM32L431xx
GenL4.menu.pnum.GENERIC_L431CBTX.build.variant=STM32L4xx/L431C(B-C)(T-U)
GenL4.menu.pnum.GENERIC_L431CBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4x1.svd

# Generic L431CCTx
GenL4.menu.pnum.GENERIC_L431CCTX=Generic L431CCTx
GenL4.menu.pnum.GENERIC_L431CCTX.upload.maximum_size=262144
GenL4.menu.pnum.GENERIC_L431CCTX.upload.maximum_data_size=65536
GenL4.menu.pnum.GENERIC_L431CCTX.build.board=GENERIC_L431CCTX
GenL4.menu.pnum.GENERIC_L431CCTX.build.product_line=STM32L431xx
GenL4.menu.pnum.GENERIC_L431CCTX.build.variant=STM32L4xx/L431C(B-C)(T-U)
GenL4.menu.pnum.GENERIC_L431CCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4x1.svd

# Generic L431CBUx
GenL4.menu.pnum.GENERIC_L431CBUX=Generic L431CBUx
GenL4.menu.pnum.GENERIC_L431CBUX.upload.maximum_size=131072
Expand All @@ -10822,6 +10813,15 @@ GenL4.menu.pnum.GENERIC_L431CBUX.build.product_line=STM32L431xx
GenL4.menu.pnum.GENERIC_L431CBUX.build.variant=STM32L4xx/L431C(B-C)(T-U)
GenL4.menu.pnum.GENERIC_L431CBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4x1.svd

# Generic L431CCTx
GenL4.menu.pnum.GENERIC_L431CCTX=Generic L431CCTx
GenL4.menu.pnum.GENERIC_L431CCTX.upload.maximum_size=262144
GenL4.menu.pnum.GENERIC_L431CCTX.upload.maximum_data_size=65536
GenL4.menu.pnum.GENERIC_L431CCTX.build.board=GENERIC_L431CCTX
GenL4.menu.pnum.GENERIC_L431CCTX.build.product_line=STM32L431xx
GenL4.menu.pnum.GENERIC_L431CCTX.build.variant=STM32L4xx/L431C(B-C)(T-U)
GenL4.menu.pnum.GENERIC_L431CCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4x1.svd

# Generic L431CCUx
GenL4.menu.pnum.GENERIC_L431CCUX=Generic L431CCUx
GenL4.menu.pnum.GENERIC_L431CCUX.upload.maximum_size=262144
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13 changes: 5 additions & 8 deletions variants/STM32L4xx/L431C(B-C)(T-U)/generic_clock.c
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Expand Up @@ -26,8 +26,7 @@ WEAK void SystemClock_Config(void)

/** Configure the main internal regulator output voltage
*/
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
{
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
Error_Handler();
}

Expand All @@ -44,22 +43,20 @@ WEAK void SystemClock_Config(void)
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}

/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
{
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
Error_Handler();
}
}
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2 changes: 1 addition & 1 deletion variants/STM32L4xx/L431C(B-C)(T-U)/ldscript.ld
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Expand Up @@ -46,7 +46,7 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 16K
RAM2 (xrw) : ORIGIN = 0x2001C000, LENGTH = 16K
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FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
}

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