Help programming a Spartan-6 SP605 evaluation board #354
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Hello to all! I have to say that I am a HUGE NOOB with FPGAs and I started a little while ago to tinker a bit. The problem is that I program the board but when I press the rst button nothing happens. I suspect that I'm doing something wrong with the constraints file that I wrote: the other thing is that I program only the xc6slx45t and I don't know what the xccace is!
I've tried some things but due to my lacking knowledge I don't know what else I can do, so any suggestion would be great! |
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Replies: 1 comment 4 replies
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Hey there! I just had a quick look at the data sheet of your board and I have to say it is a rather complex board 😉 The big "problem" is that the primary clock source (the 200MHz clock) is a differential clock. So you'll need a differential buffer to turn into a single-ended clock. Furthermore, I am not sure if the NEORV32 can be synthesized for 200 MHz on this FPGA. You might need to add a PLL / clock manager to transform the input clock into a slower one (maybe 100 MHz). Maybe you should start with a reference design. Hopefully, there is something simple as a "blinking LED demo" provided by Xilinx/AMD.
Looks good! But the actual inverter is missing. You need to add signal not_rstn_i : std_ulogic;
begin
not_rstn_i <= not rstn_i;
...
rstn_i => not_rstn_i , -- global reset, low-active, async
I think this looks good so for - except for the differential clock. I just saw there is a single-ended 27MHz oscillator on the board. Maybe you should use this one for the beginning. Then you do not have to worry about differential buffer or PLLs 😉
Seems like there is some flash card interface chip in the JTAG chain... If you can program the FPGA, you can simply ignore this second device. |
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hey thanks for the fast answer!! Well if you say it is a complex board then it boosts my confidence a bit since I couldn't figure out anything for quite some time! The "not" is there in the actual file, I just copy pasted without it for some reason! :) I think I also tried the 27MHz one and didn't have any results, I will try again with this because I am not confident enough to implement the modules needed otherwise... |
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You're welcome! 😉 I would recommend to start with a minimal "hello world" setup - so just a simple counter that drives the 4 on-board LEDs. With this setup you can check that
After that it shouldn't be a big deal to replace this simple setup by the NEORV32 and maybe use some more advanced features like the UART interface. |
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Ok I've done as you suggested and figured it out! Had to change some constraints because the simple counter wasn't working at first. The 27MHz clock worked fine, maybe later I'll try with the 100MHz. I also used the UART with the bootloader test setup and (due to your extensive user guide!) I uploaded the executable to the memory of the processor. Thanks again for everything! |
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Great to hear! 👍 |
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Hey there!
I just had a quick look at the data sheet of your board and I have to say it is a rather complex board 😉
The big "problem" is that the primary clock source (the 200MHz clock) is a differential clock. So you'll need a differential buffer to turn into a single-ended clock. Furthermore, I am not sure if the NEORV32 can be synthesized for 200 MHz on this FPGA. You might need to add a PLL / clock manager to transform the input clock into a slower one (maybe 100 MHz).
Maybe you should start with a reference design. Hopefully, there is something simple as a "blinking LED demo" provided by Xilinx/AMD.