-
Notifications
You must be signed in to change notification settings - Fork 231
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[rtl] split executable images into package and body #338
[rtl] split executable images into package and body #338
Conversation
-> neorv32_application_image.vhd => package -> neorv32_application_image_mem.vhd => body -> enables in recompile case the exchange of the FW without recompiling the rest of processors architecture
Hey there! I'm no expert when it comes to modelsim, but I think I understand the problem (partly). Right now we already have three VHDL files just for the IMEM:
Adding another file somehow feels "over the top" and I would like to avoid this. Anyway, we should fix this modelsim issue. Can we (somehow?!) use Let's try to pull in @umarcor, who is much more experienced with VHDL language issues. |
Hi Stephan,
This would also work, the only important point is, that the defintion is not recompiled because it's in the same file. If you recompile the defintion then needs the instantiating hierarchy also an recompile. Therefore i saw projects in which the entities and architectures strictly in seperate files realized. Allows changing the architecture w/o recompiling the rest of the project. BR, |
So this is more an "improvement" rather than a problem, right?
Do you have any suggestion how to implement this? 😉 |
I have not tested that yet, but maybe this could work:
|
Yes.
I don't think so. Because you can compile the whole project without noticing the miss of the file. The only point is, from the file names it isn't clear where this package is defined
The bootloader is also in imem? Then i can adjust the pull request. |
Thanks for clearing! 👍
Well, no, but the bootloader ROM uses the same concept in terms of memory initialization. So when you simulate the bootloader and recompile the sources you'll run into the same problem.
That would be great! I'll convert this into a draft. Please click "ready for review" when you're done. |
…imem.entity.vhd, memory content in neorv32_application_image.vhd
…inition in neorv32_bootloader_image.vhd
…32_bootloader_image'
In 4635402 the prototype definition needs to come first before the boot rom itself, otherwise we'll get always an compile error. Open: I need to check on my other laptop with the complete setup. I'll drop a message when it's done. BR, |
Done. It's working |
Unfortunately, this crashes GHDL: https://github.com/stnolting/neorv32/runs/6745831336?check_suite_focus=true I am not sure if this is a GHDL bug or a VHDL language issue, but declaring However, a (dirty?) workaround might be to move the |
But it seems that only the neorv32_bootloader_image.vhd fail:
As first step, i would try the restore the original neorv32_bootloader_image.vhd architetcure and check if only neorv32_imem.entity.vhd architecture works. If this works, probably could a solution the same arch like the instruction memory. |
thanks i forgot to unchange this. |
Mhh, now is something different wrong with the compile order...
|
This should work. However, the modifications to the image generator make the check fail as the bootloader image is also updated by the CI flow: https://github.com/stnolting/neorv32/runs/6752677586?check_suite_focus=true#step:4:423 |
okay got it, this i had not in mind. Restore also the original. Now it should hopefully pass. |
This works again! 👍 |
Nice 84f9007 is working :) Ho to go on? Using same approach for bootloader? |
I think this would require splitting the bootloader ROM into architecture-only and entity-only files. This would introduce another VHDL source file, which I would like to avoid. We made those splitting for the IMEM because different FPGA platforms might require a different "description" of the memory (in terms of VHDL language style; the IMEM might also be read-write). In case of the bootloader ROM this is not required as it is always read-only. What do you think about putting the |
If this is okay from your perspectiv, we can do this :) I prepare the next PR. |
It's just an idea to keep things simple 😉 But I am open for discussion.
No need for a new PR I think, we can modify this one. |
Yes i mean add a new commit to this PR |
Looks good so far! The re-compilation issue with modelsim is resolved, right? I'll do some synthesis tests with Quartus, Vivado and Radiant just to check we did not break anything. If everything goes fine, we can merge this I think. |
Hi Stephan, Looks From My Site also okay. I would say, ready for main. Thanks for collaboration. BR, |
Hi Stephan,
at the moment i do some simulations with your processor. Therefore i need to swap high frequently the FW. Due the neorv32_application_image.vhd declaration and defintion in the same file, i got from modelsim following errors:
To avoid this, i separated the declaration from the definition (https://www.ics.uci.edu/~jmoorkan/vhdlref/packageb.html): "A constant declared in a package may be deferred. This means its value is defined in the package body. The value may be changed by re-analysing only the package body"
Feel free to comment and hopefully bring on main.
BR,
Andreas