Merge pull request #36 from zhtengw/master

Make i915 module build with both linux-6.1 and linux-6.2

Makefile

@@ -1,4 +1,4 @@
-KVER        := $(shell uname -r)
+KVER        ?= $(shell uname -r)
 KBASE       := /lib/modules/$(KVER)
 KSRC        := $(KBASE)/source
 KBUILD      := $(KBASE)/build
@@ -7,6 +7,23 @@ MOD_DIR     := $(KBASE)/kernel
 INC_INCPATH := $(KBUILD_EXTMOD)/include
 DRMD        := drivers/gpu/drm/
 
+# Function for kernel version check
+KMAJ = $(shell echo $(KVER) | \
+sed -e 's/^\([0-9][0-9]*\)\.[0-9][0-9]*\.[0-9][0-9]*.*/\1/')
+KMIN = $(shell echo $(KVER) | \
+sed -e 's/^[0-9][0-9]*\.\([0-9][0-9]*\)\.[0-9][0-9]*.*/\1/')
+KREV = $(shell echo $(KVER) | \
+sed -e 's/^[0-9][0-9]*\.[0-9][0-9]*\.\([0-9][0-9]*\).*/\1/')
+
+kver_ge = $(shell \
+echo test | awk '{if($(KMAJ) < $(1)) {print 0} else { \
+if($(KMAJ) > $(1)) {print 1} else { \
+if($(KMIN) < $(2)) {print 0} else { \
+if($(KMIN) > $(2)) {print 1} else { \
+if($(KREV) < $(3)) {print 0} else { print 1 } \
+}}}}}' \
+)
+
 # ----------------------------------------------------------------------------
 # i915 module - copied from drivers/gpu/drm/i915/Makefile
 #
@@ -241,7 +258,6 @@ i915-y += \
 	display/intel_display_power.o \
 	display/intel_display_power_map.o \
 	display/intel_display_power_well.o \
-	display/intel_dkl_phy.o \
 	display/intel_dmc.o \
 	display/intel_dpio_phy.o \
 	display/intel_dpll.o \
@@ -294,6 +310,7 @@ i915-y += \
 	display/intel_ddi.o \
 	display/intel_ddi_buf_trans.o \
 	display/intel_display_trace.o \
+	display/intel_dkl_phy.o \
 	display/intel_dp.o \
 	display/intel_dp_aux.o \
 	display/intel_dp_aux_backlight.o \
@@ -324,14 +341,23 @@ i915-y += \
 i915-y += i915_perf.o
 
 # Protected execution platform (PXP) support
-i915-$(CONFIG_DRM_I915_PXP) += \
-	pxp/intel_pxp.o \
-	pxp/intel_pxp_cmd.o \
-	pxp/intel_pxp_debugfs.o \
-	pxp/intel_pxp_irq.o \
-	pxp/intel_pxp_pm.o \
-	pxp/intel_pxp_session.o \
+ifeq ($(call kver_ge,6,2,0),1)
+i915-y += \
+        pxp/intel_pxp.o \
+        pxp/intel_pxp_tee.o \
+        pxp/intel_pxp_huc.o
+else
+i915-y += \
+        pxp/intel_pxp.o \
 	pxp/intel_pxp_tee.o
+endif
+
+i915-$(CONFIG_DRM_I915_PXP) += \
+        pxp/intel_pxp_cmd.o \
+        pxp/intel_pxp_debugfs.o \
+        pxp/intel_pxp_irq.o \
+        pxp/intel_pxp_pm.o \
+        pxp/intel_pxp_session.o
 
 # Post-mortem debug and GPU hang state capture
 i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
@@ -357,7 +383,6 @@ i915-$(CONFIG_DRM_I915_GVT) += \
        intel_gvt_mmio_table.o
 
 obj-$(CONFIG_DRM_I915)           += i915.o
-obj-$(CONFIG_DRM_I915_GVT_KVMGT) += kvmgt.o
 
 CFLAGS_i915_trace_points.o := -I$(KBUILD_EXTMOD)/drivers/gpu/drm/i915
 
@@ -374,8 +399,7 @@ i915-y := $(addprefix $(DRMD)i915/,$(i915-y))
 
 LINUXINCLUDE := \
     -I$(INC_INCPATH)/trace \
-	-I$(KBUILD_EXTMOD)/drivers/gpu/drm/i915 \
-    -I$(KBUILD_EXTMOD)/drivers/gpu/drm/i915/gvt \
+    -I$(KBUILD_EXTMOD)/drivers/gpu/drm/i915 \
     $(LINUXINCLUDE)
 
 obj-m := i915.o

dkms.conf

@@ -1,8 +1,8 @@
 PACKAGE_NAME="@_PKGBASE@"
 PACKAGE_VERSION="@PKGVER@"
 
-MAKE[0]="make -j$(nproc) -C ${kernel_source_dir} M=${dkms_tree}/${PACKAGE_NAME}/${PACKAGE_VERSION}/build"
-CLEAN="make -j$(nproc) -C ${kernel_source_dir} M=${dkms_tree}/${PACKAGE_NAME}/${PACKAGE_VERSION}/build clean"
+MAKE[0]="make -j$(nproc) -C ${kernel_source_dir} M=${dkms_tree}/${PACKAGE_NAME}/${PACKAGE_VERSION}/build KVER=${kernelver}"
+CLEAN="make -j$(nproc) -C ${kernel_source_dir} M=${dkms_tree}/${PACKAGE_NAME}/${PACKAGE_VERSION}/build KVER=${kernelver} clean"
 
 BUILT_MODULE_NAME[0]="i915"
 DEST_MODULE_LOCATION[0]=/kernel/drivers/gpu/drm/i915

drivers/gpu/drm/i915/display/intel_atomic_plane.c

@@ -425,6 +425,47 @@ static bool intel_plane_do_async_flip(struct intel_plane *plane,
 	return DISPLAY_VER(i915) < 13 || old_crtc_state->uapi.async_flip;
 }
 
+static bool i9xx_must_disable_cxsr(const struct intel_crtc_state *new_crtc_state,
+				   const struct intel_plane_state *old_plane_state,
+				   const struct intel_plane_state *new_plane_state)
+{
+	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
+	bool old_visible = old_plane_state->uapi.visible;
+	bool new_visible = new_plane_state->uapi.visible;
+	u32 old_ctl = old_plane_state->ctl;
+	u32 new_ctl = new_plane_state->ctl;
+	bool modeset, turn_on, turn_off;
+
+	if (plane->id == PLANE_CURSOR)
+		return false;
+
+	modeset = intel_crtc_needs_modeset(new_crtc_state);
+	turn_off = old_visible && (!new_visible || modeset);
+	turn_on = new_visible && (!old_visible || modeset);
+
+	/* Must disable CxSR around plane enable/disable */
+	if (turn_on || turn_off)
+		return true;
+
+	if (!old_visible || !new_visible)
+		return false;
+
+	/*
+	 * Most plane control register updates are blocked while in CxSR.
+	 *
+	 * Tiling mode is one exception where the primary plane can
+	 * apparently handle it, whereas the sprites can not (the
+	 * sprite issue being only relevant on VLV/CHV where CxSR
+	 * is actually possible with a sprite enabled).
+	 */
+	if (plane->id == PLANE_PRIMARY) {
+		old_ctl &= ~DISP_TILED;
+		new_ctl &= ~DISP_TILED;
+	}
+
+	return old_ctl != new_ctl;
+}
+
 static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_state,
 					   struct intel_crtc_state *new_crtc_state,
 					   const struct intel_plane_state *old_plane_state,
@@ -482,17 +523,9 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr
 	if (turn_on) {
 		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
 			new_crtc_state->update_wm_pre = true;
-
-		/* must disable cxsr around plane enable/disable */
-		if (plane->id != PLANE_CURSOR)
-			new_crtc_state->disable_cxsr = true;
 	} else if (turn_off) {
 		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
 			new_crtc_state->update_wm_post = true;
-
-		/* must disable cxsr around plane enable/disable */
-		if (plane->id != PLANE_CURSOR)
-			new_crtc_state->disable_cxsr = true;
 	} else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
 		if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
 			/* FIXME bollocks */
@@ -504,6 +537,10 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr
 	if (visible || was_visible)
 		new_crtc_state->fb_bits |= plane->frontbuffer_bit;
 
+	if (HAS_GMCH(dev_priv) &&
+	    i9xx_must_disable_cxsr(new_crtc_state, old_plane_state, new_plane_state))
+		new_crtc_state->disable_cxsr = true;
+
 	/*
 	 * ILK/SNB DVSACNTR/Sprite Enable
 	 * IVB SPR_CTL/Sprite Enable
@@ -720,7 +757,11 @@ void intel_plane_update_noarm(struct intel_plane *plane,
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,2,0)
+	trace_intel_plane_update_noarm(plane, crtc);
+#else
 	trace_intel_plane_update_noarm(&plane->base, crtc);
+#endif
 
 	if (plane->update_noarm)
 		plane->update_noarm(plane, crtc_state, plane_state);
@@ -732,7 +773,11 @@ void intel_plane_update_arm(struct intel_plane *plane,
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,2,0)
+	trace_intel_plane_update_arm(plane, crtc);
+#else
 	trace_intel_plane_update_arm(&plane->base, crtc);
+#endif
 
 	if (crtc_state->do_async_flip && plane->async_flip)
 		plane->async_flip(plane, crtc_state, plane_state, true);
@@ -745,7 +790,11 @@ void intel_plane_disable_arm(struct intel_plane *plane,
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,2,0)
+	trace_intel_plane_disable_arm(plane, crtc);
+#else
 	trace_intel_plane_disable_arm(&plane->base, crtc);
+#endif
 	plane->disable_arm(plane, crtc_state);
 }