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FPGA verilog test source code for the S.U.R.F.E.R. MAX10 10M02 FPGA.

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FPGA-Test

FPGA verilog test source code for the S.U.R.F.E.R. MAX10 10M02 FPGA. Note that one will see "rfidr" in many places in the source code. This is short for "RFID reader", before S.U.R.F.E.R. had a unique name.

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FPGA verilog test source code for the S.U.R.F.E.R. MAX10 10M02 FPGA.

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