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Merge pull request #56 from dcci/themips64revert
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[MIPS/MIPS64] Remove another set of differences from upstream.
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@dcci
dcci committed Oct 30, 2019
2 parents 76b8af2 + 9eb0776 commit 6ce58a9
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Showing 2 changed files with 25 additions and 76 deletions.
58 changes: 14 additions & 44 deletions lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1081,14 +1081,11 @@ bool EmulateInstructionMIPS::EvaluateInstruction(uint32_t evaluate_options) {
* mc_insn.getOpcode() returns decoded opcode. However to make use
* of llvm::Mips::<insn> we would need "MipsGenInstrInfo.inc".
*/
llvm::StringRef op_name_ref = m_insn_info->getName(mc_insn.getOpcode());
const char *op_name = m_insn_info->getName(mc_insn.getOpcode()).data();

if (op_name_ref.empty())
if (op_name == nullptr)
return false;

std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();

/*
* Decoding has been done already. Just get the call-back function
* and emulate the instruction.
Expand Down Expand Up @@ -1351,10 +1348,7 @@ bool EmulateInstructionMIPS::Emulate_SUBU_ADDU(llvm::MCInst &insn) {
bool success = false;
uint64_t result;
uint8_t src, dst, rt;

llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
Expand Down Expand Up @@ -1806,9 +1800,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_3ops(llvm::MCInst &insn) {
bool success = false;
uint32_t rs, rt;
int32_t offset, pc, target = 0, rs_val, rt_val;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
Expand Down Expand Up @@ -1857,11 +1849,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_3ops_C(llvm::MCInst &insn) {
bool success = false;
uint32_t rs, rt;
int32_t offset, pc, target = 0, rs_val, rt_val;

llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();

const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
Expand Down Expand Up @@ -1941,9 +1929,7 @@ bool EmulateInstructionMIPS::Emulate_Bcond_Link_C(llvm::MCInst &insn) {
uint32_t rs;
int32_t offset, pc, target = 0;
int32_t rs_val;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
Expand Down Expand Up @@ -2012,9 +1998,7 @@ bool EmulateInstructionMIPS::Emulate_Bcond_Link(llvm::MCInst &insn) {
uint32_t rs;
int32_t offset, pc, target = 0;
int32_t rs_val;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
Expand Down Expand Up @@ -2064,9 +2048,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_2ops(llvm::MCInst &insn) {
uint32_t rs;
int32_t offset, pc, target = 0;
int32_t rs_val;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
Expand Down Expand Up @@ -2119,9 +2101,7 @@ bool EmulateInstructionMIPS::Emulate_BXX_2ops_C(llvm::MCInst &insn) {
uint32_t rs;
int32_t offset, pc, target = 0;
int32_t rs_val;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
Expand Down Expand Up @@ -2207,9 +2187,7 @@ bool EmulateInstructionMIPS::Emulate_Branch_MM(llvm::MCInst &insn) {
bool success = false;
int32_t target = 0;
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
bool update_ra = false;
uint32_t ra_offset = 0;

Expand Down Expand Up @@ -2309,9 +2287,7 @@ bool EmulateInstructionMIPS::Emulate_Branch_MM(llvm::MCInst &insn) {
bool EmulateInstructionMIPS::Emulate_JALRx16_MM(llvm::MCInst &insn) {
bool success = false;
uint32_t ra_offset = 0;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

uint32_t rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());

Expand Down Expand Up @@ -2350,9 +2326,7 @@ bool EmulateInstructionMIPS::Emulate_JALRx16_MM(llvm::MCInst &insn) {
bool EmulateInstructionMIPS::Emulate_JALx(llvm::MCInst &insn) {
bool success = false;
uint32_t offset = 0, target = 0, pc = 0, ra_offset = 0;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

/*
* JALS target
Expand Down Expand Up @@ -2700,9 +2674,7 @@ bool EmulateInstructionMIPS::Emulate_FP_branch(llvm::MCInst &insn) {
bool success = false;
uint32_t cc, fcsr;
int32_t pc, offset, target = 0;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
Expand Down Expand Up @@ -2818,9 +2790,7 @@ bool EmulateInstructionMIPS::Emulate_3D_branch(llvm::MCInst &insn) {
bool success = false;
uint32_t cc, fcsr;
int32_t pc, offset, target = 0;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
Expand Down
43 changes: 11 additions & 32 deletions lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -972,14 +972,11 @@ bool EmulateInstructionMIPS64::EvaluateInstruction(uint32_t evaluate_options) {
* mc_insn.getOpcode() returns decoded opcode. However to make use
* of llvm::Mips::<insn> we would need "MipsGenInstrInfo.inc".
*/
llvm::StringRef op_name_ref = m_insn_info->getName(mc_insn.getOpcode());
const char *op_name = m_insn_info->getName(mc_insn.getOpcode()).data();

if (op_name_ref.empty())
if (op_name == nullptr)
return false;

std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();

/*
* Decoding has been done already. Just get the call-back function
* and emulate the instruction.
Expand Down Expand Up @@ -1264,9 +1261,7 @@ bool EmulateInstructionMIPS64::Emulate_DSUBU_DADDU(llvm::MCInst &insn) {
bool success = false;
uint64_t result;
uint8_t src, dst, rt;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

dst = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
src = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
Expand Down Expand Up @@ -1345,9 +1340,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops(llvm::MCInst &insn) {
bool success = false;
uint32_t rs, rt;
int64_t offset, pc, rs_val, rt_val, target = 0;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
rt = m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
Expand Down Expand Up @@ -1399,9 +1392,7 @@ bool EmulateInstructionMIPS64::Emulate_Bcond_Link(llvm::MCInst &insn) {
uint32_t rs;
int64_t offset, pc, target = 0;
int64_t rs_val;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
Expand Down Expand Up @@ -1511,9 +1502,7 @@ bool EmulateInstructionMIPS64::Emulate_Bcond_Link_C(llvm::MCInst &insn) {
bool success = false;
uint32_t rs;
int64_t offset, pc, rs_val, target = 0;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
Expand Down Expand Up @@ -1581,9 +1570,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops(llvm::MCInst &insn) {
bool success = false;
uint32_t rs;
int64_t offset, pc, rs_val, target = 0;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
Expand Down Expand Up @@ -1668,9 +1655,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_3ops_C(llvm::MCInst &insn) {
bool success = false;
uint32_t rs, rt;
int64_t offset, pc, rs_val, rt_val, target = 0;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
Expand Down Expand Up @@ -1750,9 +1735,7 @@ bool EmulateInstructionMIPS64::Emulate_BXX_2ops_C(llvm::MCInst &insn) {
uint32_t rs;
int64_t offset, pc, target = 0;
int64_t rs_val;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
uint32_t current_inst_size = m_insn_info->get(insn.getOpcode()).getSize();

rs = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
Expand Down Expand Up @@ -1992,9 +1975,7 @@ bool EmulateInstructionMIPS64::Emulate_FP_branch(llvm::MCInst &insn) {
bool success = false;
uint32_t cc, fcsr;
int64_t pc, offset, target = 0;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

/*
* BC1F cc, offset
Expand Down Expand Up @@ -2119,9 +2100,7 @@ bool EmulateInstructionMIPS64::Emulate_3D_branch(llvm::MCInst &insn) {
bool success = false;
uint32_t cc, fcsr;
int64_t pc, offset, target = 0;
llvm::StringRef op_name_ref = m_insn_info->getName(insn.getOpcode());
std::string op_name_str = op_name_ref;
const char *op_name = op_name_str.c_str();
const char *op_name = m_insn_info->getName(insn.getOpcode()).data();

cc = m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
offset = insn.getOperand(1).getImm();
Expand Down

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