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Merge pull request swiftlang#76302 from drexin/wip-typed-throws-empty
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[IRGen] Fix SignatureExpansion::expandAsyncAwaitType
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drexin authored Sep 6, 2024
2 parents 0c30f55 + a4c1d2e commit cf2af68
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Showing 2 changed files with 22 additions and 10 deletions.
17 changes: 7 additions & 10 deletions lib/IRGen/GenCall.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2330,17 +2330,14 @@ void SignatureExpansion::expandAsyncAwaitType() {
if (!nativeError.shouldReturnTypedErrorIndirectly()) {
auto combined = combineResultAndTypedErrorType(IGM, native, nativeError);

if (combined.combinedTy->isVoidTy()) {
addErrorResult();
return;
}

if (auto *structTy = dyn_cast<llvm::StructType>(combined.combinedTy)) {
for (auto *elem : structTy->elements()) {
components.push_back(elem);
if (!combined.combinedTy->isVoidTy()) {
if (auto *structTy = dyn_cast<llvm::StructType>(combined.combinedTy)) {
for (auto *elem : structTy->elements()) {
components.push_back(elem);
}
} else {
components.push_back(combined.combinedTy);
}
} else {
components.push_back(combined.combinedTy);
}
addErrorResult();
ResultIRType = llvm::StructType::get(IGM.getLLVMContext(), components);
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15 changes: 15 additions & 0 deletions test/IRGen/typed_throws.swift
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,8 @@

// RUN: %target-swift-frontend -primary-file %s -emit-ir -enable-library-evolution

// RUN: %target-swift-frontend -primary-file %s -emit-ir -O

// XFAIL: CPU=arm64e
// REQUIRES: PTRSIZE=64

Expand Down Expand Up @@ -232,3 +234,16 @@ protocol Proto {
// This used to crash.
static func f2() throws(SP) -> Int64
}

@inline(never)
@available(SwiftStdlib 6.0, *)
public func passthroughAsync<T, E: Error>(f: () async throws(E) -> T) async throws(E) -> T {
try await f()
}

@available(SwiftStdlib 6.0, *)
public func reabstractAsyncVoidThrowsNever() async {
await passthroughAsync {
()
}
}

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