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V0.9: ISA V1.2 on env1
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@sy2002 sy2002 released this 22 Aug 13:30
· 1016 commits to master since this release
V0.9_ISA_V1.2
1862eba

Feature complete QNICE CPU, original instruction set architecture (ISA V1.2) as of December 2007, is running on a simulated version of the QNICE/A evaluation board. Slighly enhanced TIL display (4 digits instead of two plus a mask register). Lower 32kB are ROM, upper 32kB are RAM. No UART, yet. For convenient simulation in ISIM, the amount of register bank is restricted to 16 and RAM to 256 bytes; just change env1_globals.vhd to get the full amount of RAM of the real QNICE/A and the full register file size of the QNICE CPU.

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