Add compare_exchange, compare_exchange_weak, and fetch_update

taiki-e · Jun 25, 2022 · 752bdf0 · 752bdf0
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diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -10,6 +10,8 @@ Note: In this file, do not use the hard wrap in the middle of a sentence for com
 
 ## [Unreleased]
 
+- Add `compare_exchange`, `compare_exchange_weak`, and `fetch_update`.
+
 - Support x86_64 128-bit atomics when the `cmpxchg16b` target feature is enabled at compile-time.
 
 ## [0.2.8] - 2022-06-21

diff --git a/README.md b/README.md
@@ -19,24 +19,24 @@ This crate provides a way to soundly perform such operations.
 
 Currently, x86, x86_64, ARM (v6-m, v7+), AArch64, RISC-V, MIPS32r2, MIPS64r2, PowerPC, and s390x are supported.
 
-| target_arch                       | primitives                                          | [load]/[store] | [swap] |
-| --------------------------------- | --------------------------------------------------- |:--------------:|:------:|
-| x86                               | isize,usize,i8,u8,i16,u16,i32,u32                   | ✓              | ✓      |
-| x86_64                            | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64           | ✓              | ✓      |
-| x86_64 (+cmpxchg16b)              | i128,u128                                           | ✓              | ✓      |
-| arm (v6-m, v7+)                   | isize,usize,i8,u8,i16,u16,i32,u32                   | ✓              | ✓\[1]  |
-| arm (v7-a)                        | i64,u64                                             | ✓              | ✓      |
-| aarch64 \[2]                      | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64,i128,u128 | ✓              | ✓      |
-| riscv32                           | isize,usize,i8,u8,i16,u16,i32,u32                   | ✓              | ✓\[1]  |
-| riscv64                           | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64           | ✓              | ✓\[1]  |
-| mips \[3]                         | isize,usize,i8,u8,i16,u16,i32,u32                   | ✓              | ✓      |
-| mips64 \[3]                       | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64           | ✓              | ✓      |
-| powerpc \[3]                      | isize,usize,i8,u8,i16,u16,i32,u32                   | ✓              | ✓      |
-| powerpc64 \[3]                    | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64           | ✓              | ✓      |
-| powerpc64 (le or pwr8+) \[3] \[4] | i128,u128                                           | ✓              | ✓      |
-| s390x \[3]                        | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64,i128,u128 | ✓              | ✓      |
-
-\[1] ARM's atomic swap is not available on v6-m (thumbv6m). RISC-V's atomic swap is not available on targets without the A (or G) extension such as riscv32i, riscv32imc, etc.<br>
+| target_arch                       | primitives                                          | load/store | RMW   |
+| --------------------------------- | --------------------------------------------------- |:----------:|:-----:|
+| x86                               | isize,usize,i8,u8,i16,u16,i32,u32                   | ✓          | ✓     |
+| x86_64                            | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64           | ✓          | ✓     |
+| x86_64 (+cmpxchg16b)              | i128,u128                                           | ✓          | ✓     |
+| arm (v6-m, v7+)                   | isize,usize,i8,u8,i16,u16,i32,u32                   | ✓          | ✓\[1] |
+| arm (v7-a)                        | i64,u64                                             | ✓          | ✓     |
+| aarch64 \[2]                      | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64,i128,u128 | ✓          | ✓     |
+| riscv32                           | isize,usize,i8,u8,i16,u16,i32,u32                   | ✓          | ✓\[1] |
+| riscv64                           | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64           | ✓          | ✓\[1] |
+| mips \[3]                         | isize,usize,i8,u8,i16,u16,i32,u32                   | ✓          | ✓     |
+| mips64 \[3]                       | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64           | ✓          | ✓     |
+| powerpc \[3]                      | isize,usize,i8,u8,i16,u16,i32,u32                   | ✓          | ✓     |
+| powerpc64 \[3]                    | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64           | ✓          | ✓     |
+| powerpc64 (le or pwr8+) \[3] \[4] | i128,u128                                           | ✓          | ✓     |
+| s390x \[3]                        | isize,usize,i8,u8,i16,u16,i32,u32,i64,u64,i128,u128 | ✓          | ✓     |
+
+\[1] ARM's atomic RMW operations are not available on v6-m (thumbv6m). RISC-V's atomic RMW operations are not available on targets without the A (or G) extension such as riscv32i, riscv32imc, etc.<br>
 \[2] If target features such as `lse` and `lse2` are enabled at compile-time, more efficient instructions are used.<br>
 \[3] Requires nightly due to `#![feature(asm_experimental_arch)]`.<br>
 \[4] target-cpu `pwr8`, `pwr9`, or `pwr10`.<br>
@@ -48,9 +48,6 @@ Feel free to submit an issue if your target is not supported yet.
 - [portable-atomic]: Portable atomic types including support for 128-bit atomics, atomic float, etc.
 - [atomic-memcpy]: Byte-wise atomic memcpy.
 
-[load]: https://docs.rs/atomic-maybe-uninit/latest/atomic_maybe_uninit/struct.AtomicMaybeUninit.html#method.load
-[store]: https://docs.rs/atomic-maybe-uninit/latest/atomic_maybe_uninit/struct.AtomicMaybeUninit.html#method.store
-[swap]: https://docs.rs/atomic-maybe-uninit/latest/atomic_maybe_uninit/struct.AtomicMaybeUninit.html#method.swap
 [atomic-memcpy]: https://github.com/taiki-e/atomic-memcpy
 [portable-atomic]: https://github.com/taiki-e/portable-atomic
 [undefined-behavior]: https://doc.rust-lang.org/reference/behavior-considered-undefined.html