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^ munge code_gen and config #59

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Dec 14, 2024
Merged

^ munge code_gen and config #59

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Binary file modified wrappers/simulink/munge_blk.slx
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5 changes: 3 additions & 2 deletions wrappers/simulink/munge_code_gen.m
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Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@
%and what it will be named
vhdlfile = fullfile(vhdlfilefolder, [bdroot '_munge_static.vhd']); %filename for vhd file

inout_port_count = number_of_divisions*division_size_bits;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%upperdec%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
upperlines = [
"LIBRARY IEEE, common_pkg_lib, casper_flow_control_lib;"
Expand All @@ -18,8 +19,8 @@
" port ("
" clk : in std_logic := '1';"
" ce : in std_logic := '1';"
" din : in std_logic_vector;"
" dout : out std_logic_vector"
sprintf(" din : in std_logic_vector(%d-1 downto 0);", inout_port_count)
sprintf(" dout : out std_logic_vector(%d-1 downto 0)", inout_port_count)
" );"
"end ENTITY;"
"ARCHITECTURE rtl of munge_static is"
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