Core 2.0.1.1

README.md

@@ -27,6 +27,10 @@ You can use [Arduino-ESP32 Online Documentation](https://docs.espressif.com/proj
 * [FAQ](https://docs.espressif.com/projects/arduino-esp32/en/latest/faq.html)
 * [Troubleshooting](https://docs.espressif.com/projects/arduino-esp32/en/latest/troubleshooting.html)
 
+### Supported Chips
+
+Visit the [supported chips](https://docs.espressif.com/projects/arduino-esp32/en/latest/getting_started.html#supported-soc-s) documentation to see the list of current supported ESP32 SoCs.
+
 ### Decoding exceptions
 
 You can use [EspExceptionDecoder](https://github.com/me-no-dev/EspExceptionDecoder) to get meaningful call trace.

boards.txt

@@ -9690,10 +9690,20 @@ deneyapmini.build.boot=qio
 deneyapmini.build.partitions=default
 deneyapmini.build.defines=
 
-deneyapmini.menu.CDCOnBoot.default=Disabled
-deneyapmini.menu.CDCOnBoot.default.build.cdc_on_boot=0
-deneyapmini.menu.CDCOnBoot.cdc=Enabled
-deneyapmini.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
+deneyapmini.menu.CDCOnBoot.default=Enabled
+deneyapmini.menu.CDCOnBoot.default.build.cdc_on_boot=1
+deneyapmini.menu.CDCOnBoot.cdc=Disabled
+deneyapmini.menu.CDCOnBoot.cdc.build.cdc_on_boot=0
+
+deneyapmini.menu.MSCOnBoot.default=Disabled
+deneyapmini.menu.MSCOnBoot.default.build.msc_on_boot=0
+deneyapmini.menu.MSCOnBoot.msc=Enabled
+deneyapmini.menu.MSCOnBoot.msc.build.msc_on_boot=1
+
+deneyapmini.menu.DFUOnBoot.default=Disabled
+deneyapmini.menu.DFUOnBoot.default.build.dfu_on_boot=0
+deneyapmini.menu.DFUOnBoot.dfu=Enabled
+deneyapmini.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
 
 deneyapmini.menu.PSRAM.disabled=Disabled
 deneyapmini.menu.PSRAM.disabled.build.defines=

cores/esp32/cbuf.h

@@ -62,7 +62,7 @@ class cbuf
 
     cbuf *next;
 
-private:
+protected:
     inline char* wrap_if_bufend(char* ptr) const
     {
         return (ptr == _bufend) ? _buf : ptr;

cores/esp32/core_version.h

@@ -1,4 +1,4 @@
-#define ARDUINO_ESP32_GIT_VER 0xa443b816
-#define ARDUINO_ESP32_GIT_DESC 2.0.1
-#define ARDUINO_ESP32_RELEASE_2_0_1
-#define ARDUINO_ESP32_RELEASE "2_0_1"
+#define ARDUINO_ESP32_GIT_VER 0x48fb4e47
+#define ARDUINO_ESP32_GIT_DESC 2.0.1.1
+#define ARDUINO_ESP32_RELEASE_2_0_1_1
+#define ARDUINO_ESP32_RELEASE "2_0_1_1"

cores/esp32/esp32-hal-i2c-slave.c

@@ -302,7 +302,7 @@ esp_err_t i2cSlaveInit(uint8_t num, int sda, int scl, uint16_t slaveID, uint32_t
     i2c_ll_slave_init(i2c->dev);
     i2c_ll_set_fifo_mode(i2c->dev, true);
     i2c_ll_set_slave_addr(i2c->dev, slaveID, false);
-    i2c_ll_set_tout(i2c->dev, 32000);
+    i2c_ll_set_tout(i2c->dev, I2C_LL_MAX_TIMEOUT);
     i2c_slave_set_frequency(i2c, frequency);
 
     if (!i2c_slave_check_line_state(sda, scl)) {

cores/esp32/esp32-hal-i2c.c

@@ -24,6 +24,7 @@
 #include "soc/soc_caps.h"
 #include "soc/i2c_periph.h"
 #include "hal/i2c_hal.h"
+#include "hal/i2c_ll.h"
 #include "driver/i2c.h"
 
 typedef volatile struct {
@@ -91,6 +92,8 @@ esp_err_t i2cInit(uint8_t i2c_num, int8_t sda, int8_t scl, uint32_t frequency){
         } else {
             bus[i2c_num].initialized = true;
             bus[i2c_num].frequency = frequency;
+            //Clock Stretching Timeout: 20b:esp32, 5b:esp32-c3, 24b:esp32-s2
+            i2c_set_timeout((i2c_port_t)i2c_num, I2C_LL_MAX_TIMEOUT);
         }
     }
 #if !CONFIG_DISABLE_HAL_LOCKS

cores/esp32/esp32-hal-ledc.c

@@ -17,7 +17,6 @@
 #include "freertos/task.h"
 #include "freertos/semphr.h"
 #include "esp32-hal-matrix.h"
-#include "soc/soc_caps.h"
 #include "soc/ledc_reg.h"
 #include "soc/ledc_struct.h"
 #include "driver/periph_ctrl.h"
@@ -332,21 +331,3 @@ double ledcChangeFrequency(uint8_t chan, double freq, uint8_t bit_num)
     double res_freq = _ledcSetupTimerFreq(chan, freq, bit_num);
     return res_freq;
 }
-
-static int8_t pin_to_channel[SOC_GPIO_PIN_COUNT] = { 0 };
-static int cnt_channel = SOC_LEDC_CHANNEL_NUM;
-void analogWrite(uint8_t pin, int value) {
-  // Use ledc hardware for internal pins
-  if (pin < SOC_GPIO_PIN_COUNT) {
-    if (pin_to_channel[pin] == 0) {
-      if (!cnt_channel) {
-          log_e("No more analogWrite channels available! You can have maximum %u", SOC_LEDC_CHANNEL_NUM);
-          return;
-      }
-      pin_to_channel[pin] = cnt_channel--;
-      ledcAttachPin(pin, cnt_channel);
-      ledcSetup(cnt_channel, 1000, 8);
-    }
-    ledcWrite(pin_to_channel[pin] - 1, value);
-  }
-}

cores/esp32/esp32-hal.h

@@ -90,8 +90,6 @@ void yield(void);
 #include "esp32-hal-psram.h"
 #include "esp32-hal-cpu.h"
 
-void analogWrite(uint8_t pin, int value);
-
 //returns chip temperature in Celsius
 float temperatureRead();
 

package.json

@@ -1,6 +1,6 @@
 {
     "name": "framework-arduinoespressif32",
     "description": "Arduino Wiring-based Framework (ESP32 Core) for Tasmota",
-    "version": "2.0.1",
+    "version": "2.0.1+1",
     "url": "https://github.com/tasmota/arduino-esp32"
 }

tools/platformio-build-esp32.py

@@ -129,6 +129,7 @@
         "-u", "pthread_include_pthread_impl",
         "-u", "pthread_include_pthread_cond_impl",
         "-u", "pthread_include_pthread_local_storage_impl",
+        "-u", "pthread_include_pthread_rwlock_impl",
         "-u", "ld_include_highint_hdl",
         "-u", "start_app",
         "-u", "start_app_other_cores",
@@ -332,9 +333,10 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-3631-g7033e3b57\\"'),
+        ("IDF_VER", '\\"v4.4-dev-3728-g7cac8278e\\"'),
         "ESP_PLATFORM",
         "NDEBUG",
+        "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
         ("F_CPU", "$BOARD_F_CPU"),

tools/platformio-build-esp32c3.py

@@ -126,6 +126,7 @@
         "-u", "pthread_include_pthread_impl",
         "-u", "pthread_include_pthread_cond_impl",
         "-u", "pthread_include_pthread_local_storage_impl",
+        "-u", "pthread_include_pthread_rwlock_impl",
         "-u", "start_app",
         "-u", "__ubsan_include",
         "-u", "vfs_include_syscalls_impl",
@@ -291,9 +292,10 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-3631-g7033e3b57\\"'),
+        ("IDF_VER", '\\"v4.4-dev-3728-g7cac8278e\\"'),
         "ESP_PLATFORM",
         "NDEBUG",
+        "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
         ("F_CPU", "$BOARD_F_CPU"),

tools/platformio-build-esp32s2.py

@@ -124,6 +124,7 @@
         "-u", "pthread_include_pthread_impl",
         "-u", "pthread_include_pthread_cond_impl",
         "-u", "pthread_include_pthread_local_storage_impl",
+        "-u", "pthread_include_pthread_rwlock_impl",
         "-u", "ld_include_highint_hdl",
         "-u", "start_app",
         "-u", "__ubsan_include",
@@ -318,9 +319,10 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4-dev-3631-g7033e3b57\\"'),
+        ("IDF_VER", '\\"v4.4-dev-3728-g7cac8278e\\"'),
         "ESP_PLATFORM",
         "NDEBUG",
+        "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",
         "ESP32",
         ("F_CPU", "$BOARD_F_CPU"),

tools/sdk/esp32/include/config/sdkconfig.h

@@ -639,6 +639,7 @@
 #define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
 #define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
 #define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
+#define CONFIG_REDUCE_PHY_TX_POWER CONFIG_ESP_PHY_REDUCE_TX_POWER
 #define CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE
 #define CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN
 #define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
@@ -676,5 +677,5 @@
 #define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
 #define CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP
-#define CONFIG_ARDUINO_IDF_COMMIT "7033e3b57"
+#define CONFIG_ARDUINO_IDF_COMMIT "7cac8278e"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"

tools/sdk/esp32/include/driver/include/driver/mcpwm.h

@@ -174,7 +174,6 @@ typedef enum {
 /**
  * @brief Interrupt masks for MCPWM capture
  */
-__attribute__ ((deprecated("please use callback function to avoid directly accessing registers")))
 typedef enum {
     MCPWM_LL_INTR_CAP0 = BIT(27), ///< Capture 0 happened
     MCPWM_LL_INTR_CAP1 = BIT(28), ///< Capture 1 happened
@@ -922,7 +921,6 @@ esp_err_t mcpwm_sync_invert_gpio_synchro(mcpwm_unit_t mcpwm_num, mcpwm_sync_sign
  *     - ESP_OK Success
  *     - ESP_ERR_INVALID_ARG Function pointer error.
  */
-__attribute__((deprecated("interrupt events are handled by driver, please use callback")))
 esp_err_t mcpwm_isr_register(mcpwm_unit_t mcpwm_num, void (*fn)(void *), void *arg, int intr_alloc_flags,
                              intr_handle_t *handle);
 

tools/sdk/esp32/include/efuse/include/esp_efuse.h

@@ -6,11 +6,9 @@
 
 #pragma once
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
+#include <stdbool.h>
 #include <stdint.h>
+
 #include "esp_err.h"
 #include "esp_log.h"
 #include "soc/soc_caps.h"
@@ -29,6 +27,10 @@ extern "C" {
 #include "esp32h2/rom/secure_boot.h"
 #endif
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define ESP_ERR_EFUSE                              0x1600                     /*!< Base error code for efuse api. */
 #define ESP_OK_EFUSE_CNT                          (ESP_ERR_EFUSE + 0x01)      /*!< OK the required number of bits is set. */
 #define ESP_ERR_EFUSE_CNT_IS_FULL                 (ESP_ERR_EFUSE + 0x02)      /*!< Error field is full. */

tools/sdk/esp32/include/esp_phy/include/phy.h

@@ -68,6 +68,13 @@ void phy_close_rf(void);
 void phy_xpd_tsens(void);
 #endif
 
+#if CONFIG_IDF_TARGET_ESP32C3
+/**
+ * @brief Update internal state of PHY when wifi deinit powers off the wifi power domain.
+ */
+void phy_init_flag(void);
+#endif
+
 /**
  * @brief Store and load PHY digital registers.
  *

tools/sdk/esp32/include/esp_timer/include/esp_timer.h

@@ -1,16 +1,8 @@
-// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -83,11 +75,28 @@ typedef struct {
     bool skip_unhandled_events;     //!< Skip unhandled events for periodic timers
 } esp_timer_create_args_t;
 
+
+/**
+ * @brief Minimal initialization of esp_timer
+ *
+ * @note This function is called from startup code. Applications do not need
+ * to call this function before using other esp_timer APIs.
+ *
+ * This function can be called very early in startup process, after this call
+ * only esp_timer_get_time function can be used.
+ *
+ * @return
+ *      - ESP_OK on success
+ */
+esp_err_t esp_timer_early_init(void);
+
 /**
  * @brief Initialize esp_timer library
  *
  * @note This function is called from startup code. Applications do not need
  * to call this function before using other esp_timer APIs.
+ * Before calling this function, esp_timer_early_init must be called by the
+ * startup code.
  *
  * @return
  *      - ESP_OK on success

tools/sdk/esp32/include/freertos/port/xtensa/include/freertos/portmacro.h

@@ -155,15 +155,20 @@ void vPortAssertIfInISR(void);
 BaseType_t xPortInterruptedFromISRContext(void);
 
 /**
- * @brief Disable interrupts in a nested manner
+ * @brief Disable interrupts in a nested manner (meant to be called from ISRs)
  *
- * - Cleaner solution allows nested interrupts disabling and restoring via local registers or stack.
- * - They can be called from interrupts too.
- * - WARNING Only applies to current CPU.
- * @note [refactor-todo] Define this as portSET_INTERRUPT_MASK_FROM_ISR() instead
- * @return unsigned Previous interrupt state
+ * @warning Only applies to current CPU.
+ * @return UBaseType_t Previous interrupt level
  */
-static inline unsigned __attribute__((always_inline)) portENTER_CRITICAL_NESTED(void);
+static inline UBaseType_t xPortSetInterruptMaskFromISR(void);
+
+/**
+ * @brief Reenable interrupts in a nested manner (meant to be called from ISRs)
+ *
+ * @warning Only applies to current CPU.
+ * @param prev_level Previous interrupt level
+ */
+static inline void vPortClearInterruptMaskFromISR(UBaseType_t prev_level);
 
 /* ---------------------- Spinlocks ------------------------
  * - Modifications made to critical sections to support SMP
@@ -416,8 +421,6 @@ static inline BaseType_t IRAM_ATTR xPortGetCoreID(void);
 
 // --------------------- Interrupts ------------------------
 
-#define portEXIT_CRITICAL_NESTED(state)     do { portbenchmarkINTERRUPT_RESTORE(state); XTOS_RESTORE_JUST_INTLEVEL(state); } while (0)
-
 /**
  * - Only applies to current core
  * - These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level.
@@ -430,8 +433,8 @@ static inline BaseType_t IRAM_ATTR xPortGetCoreID(void);
 /**
  * ISR versions to enable/disable interrupts
  */
-#define portSET_INTERRUPT_MASK_FROM_ISR()            portENTER_CRITICAL_NESTED()
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(state)     portEXIT_CRITICAL_NESTED(state)
+#define portSET_INTERRUPT_MASK_FROM_ISR()                   xPortSetInterruptMaskFromISR()
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(prev_level)       vPortClearInterruptMaskFromISR(prev_level)
 
 #define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
 
@@ -530,11 +533,17 @@ static inline BaseType_t IRAM_ATTR xPortGetCoreID(void);
 
 // --------------------- Interrupts ------------------------
 
-static inline unsigned portENTER_CRITICAL_NESTED(void)
+static inline UBaseType_t xPortSetInterruptMaskFromISR(void)
 {
-    unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
+    UBaseType_t prev_int_level = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
     portbenchmarkINTERRUPT_DISABLE();
-    return state;
+    return prev_int_level;
+}
+
+static inline void vPortClearInterruptMaskFromISR(UBaseType_t prev_level)
+{
+    portbenchmarkINTERRUPT_RESTORE(prev_level);
+    XTOS_RESTORE_JUST_INTLEVEL(prev_level);
 }
 
 // ---------------------- Spinlocks ------------------------
@@ -737,6 +746,14 @@ bool xPortcheckValidStackMem(const void *ptr);
 #define portVALID_TCB_MEM(ptr) xPortCheckValidTCBMem(ptr)
 #define portVALID_STACK_MEM(ptr) xPortcheckValidStackMem(ptr)
 
+
+
+/* ---------------------------------------------------- Deprecate ------------------------------------------------------
+ * - Pull in header containing deprecated macros here
+ * ------------------------------------------------------------------------------------------------------------------ */
+
+#include "portmacro_deprecated.h"
+
 #ifdef __cplusplus
 }
 #endif