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Update README.md
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teekamkhandelwal authored Oct 21, 2024
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Expand Up @@ -46,7 +46,8 @@ Basic understanding of Verilog HDL and digital design
### Running the Simulation
1. Clone the repository:
git clone https://github.com/teekamkhandelwal/SRAM_Controller.git
cd sram-controller

cd SRAM_Controller
Open your Verilog simulator.

Load sram_controller.v and tb_combined.v in the simulator.
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