#14427: set queue size based on lanes

- Additional dispatch buffer space for the Eth tunneler, although limited by pow2, can be used remove debug code
tenstorrent · Jan 16, 2025 · 937034f · 937034f
1 parent 4fc8193
commit 937034f
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Showing 4 changed files with 22 additions and 27 deletions.
diff --git a/tt_metal/impl/dispatch/kernel_config/eth_tunneler.cpp b/tt_metal/impl/dispatch/kernel_config/eth_tunneler.cpp
@@ -28,7 +28,16 @@ void EthTunnelerKernel::GenerateStaticConfigs() {
     }
     static_config_.endpoint_id_start_index = 0xDACADACA;
     static_config_.in_queue_start_addr_words = 0x19A00 >> 4;
-    static_config_.in_queue_size_words = 0x4000 >> 4;
+    // Input queue size can be extended based on number of tunnel lanes
+    // Eth L1 size is ~180K
+    switch (static_config_.vc_count.value()) {
+        case 1:
+        case 2: static_config_.in_queue_size_words = 65536 >> 4; break;
+        case 3:
+        case 4:
+        case 5: static_config_.in_queue_size_words = 32768 >> 4; break;
+        default: static_config_.in_queue_size_words = 16384 >> 4; break;
+    }
     static_config_.kernel_status_buf_addr_arg = 0x39000;
     static_config_.kernel_status_buf_size_bytes = 0x7000;
     static_config_.timeout_cycles = 0;

diff --git a/tt_metal/impl/dispatch/kernels/cq_dispatch.cpp b/tt_metal/impl/dispatch/kernels/cq_dispatch.cpp
@@ -879,7 +879,6 @@ static void process_wait() {
             IDLE_ERISC_HEARTBEAT_AND_RETURN(heartbeat);
         } while (!wrap_ge(*sem_addr, count));
     }
-    DPRINT << " DISPATCH WAIT DONE" << ENDL();
     WAYPOINT("PWD");
 
     if (clear_count) {

diff --git a/tt_metal/impl/dispatch/kernels/cq_prefetch.cpp b/tt_metal/impl/dispatch/kernels/cq_prefetch.cpp
@@ -13,7 +13,6 @@
 #include "tt_metal/impl/dispatch/kernels/cq_common.hpp"
 #include "debug/dprint.h"
 #include "noc/noc_parameters.h"  // PCIE_ALIGNMENT
-#include "debug/ring_buffer.h"
 
 constexpr uint32_t CQ_PREFETCH_CMD_BARE_MIN_SIZE = PCIE_ALIGNMENT;  // for NOC PCIe alignemnt
 struct CQPrefetchHToPrefetchDHeader_s {
@@ -1139,12 +1138,12 @@ bool process_cmd(
 
     switch (cmd->base.cmd_id) {
         case CQ_PREFETCH_CMD_RELAY_LINEAR:
-            DPRINT << "relay linear: " << cmd_ptr << ENDL();
+            // DPRINT << "relay linear: " << cmd_ptr << ENDL();
             stride = process_relay_linear_cmd(cmd_ptr, downstream_data_ptr);
             break;
 
         case CQ_PREFETCH_CMD_RELAY_PAGED:
-            DPRINT << "relay dram page: " << cmd_ptr << ENDL();
+            // DPRINT << "relay dram page: " << cmd_ptr << ENDL();
             {
                 uint32_t is_dram_and_length_adjust = cmd->relay_paged.is_dram_and_length_adjust;
                 uint32_t is_dram = is_dram_and_length_adjust & (1 << CQ_PREFETCH_RELAY_PAGED_IS_DRAM_SHIFT);
@@ -1158,7 +1157,7 @@ bool process_cmd(
             break;
 
         case CQ_PREFETCH_CMD_RELAY_PAGED_PACKED:
-            DPRINT << "relay paged packed: " << cmd_ptr << ENDL();
+            // DPRINT << "relay paged packed" << ENDL();
             if (exec_buf) {
                 stride =
                     process_exec_buf_relay_paged_packed_cmd(cmd_ptr, downstream_data_ptr, l1_cache, exec_buf_state);
@@ -1168,7 +1167,7 @@ bool process_cmd(
             break;
 
         case CQ_PREFETCH_CMD_RELAY_INLINE:
-            DPRINT << "relay inline: " << cmd_ptr << ENDL();
+            // DPRINT << "relay inline" << ENDL();
             if constexpr (exec_buf) {
                 if (cmd->relay_inline.dispatcher_type == DispatcherSelect::DISPATCH_MASTER) {
                     stride = process_exec_buf_relay_inline_cmd<DispatchRelayInlineState>(
@@ -1189,7 +1188,7 @@ bool process_cmd(
             break;
 
         case CQ_PREFETCH_CMD_RELAY_INLINE_NOFLUSH:
-            DPRINT << "inline no flush: " << cmd_ptr << ENDL();
+            // DPRINT << "inline no flush" << ENDL();
             if (exec_buf) {
                 stride = process_exec_buf_relay_inline_noflush_cmd(cmd_ptr, downstream_data_ptr, exec_buf_state);
             } else {
@@ -1198,7 +1197,7 @@ bool process_cmd(
             break;
 
         case CQ_PREFETCH_CMD_EXEC_BUF:
-            DPRINT << "exec buf: " << cmd_ptr << ENDL();
+            // DPRINT << "exec buf: " << cmd_ptr << ENDL();
             ASSERT(!exec_buf);
             if (is_h_variant) {
                 ASSERT(stall_state == STALLED);  // ExecBuf must be preceded by a prefetcher stall
@@ -1208,20 +1207,20 @@ bool process_cmd(
             break;
 
         case CQ_PREFETCH_CMD_EXEC_BUF_END:
-            DPRINT << "exec buf end: " << cmd_ptr << ENDL();
+            // DPRINT << "exec buf end: " << cmd_ptr << ENDL();
             ASSERT(exec_buf);
             stride = process_exec_buf_relay_inline_cmd<DispatchRelayInlineState>(
                 cmd_ptr, downstream_data_ptr, exec_buf_state);
             done = true;
             break;
 
         case CQ_PREFETCH_CMD_STALL:
-            DPRINT << "stall: " << cmd_ptr << ENDL();
+            // DPRINT << "stall" << ENDL();
             stride = process_stall(cmd_ptr);
             break;
 
         case CQ_PREFETCH_CMD_DEBUG:
-            DPRINT << "debug: " << cmd_ptr << ENDL();
+            // DPRINT << "debug" << ENDL();
             //  Splitting debug cmds not implemented for exec_bufs (yet)
             if (exec_buf) {
                 ASSERT(0);
@@ -1230,14 +1229,14 @@ bool process_cmd(
             break;
 
         case CQ_PREFETCH_CMD_TERMINATE:
-            DPRINT << "prefetch terminating_" << is_h_variant << is_d_variant << ENDL();
+            // DPRINT << "prefetch terminating_" << is_h_variant << is_d_variant << ENDL();
             ASSERT(!exec_buf);
             done = true;
             break;
 
         default:
-            DPRINT << "prefetch invalid command:" << (uint32_t)cmd->base.cmd_id << " " << cmd_ptr << " "
-                   << cmddat_q_base << ENDL();
+            // DPRINT << "prefetch invalid command:" << (uint32_t)cmd->base.cmd_id << " " << cmd_ptr << " " <<
+            // cmddat_q_base << ENDL();
             //  DPRINT << HEX() << *(uint32_t*)cmd_ptr << ENDL();
             //  DPRINT << HEX() << *((uint32_t*)cmd_ptr+1) << ENDL();
             //  DPRINT << HEX() << *((uint32_t*)cmd_ptr+2) << ENDL();

diff --git a/tt_metal/impl/dispatch/kernels/packet_queue.hpp b/tt_metal/impl/dispatch/kernels/packet_queue.hpp
@@ -115,18 +115,6 @@ bool process_queues(F&& func) {
         std::forward<F>(func), std::make_index_sequence<NetworkTypeSequence::size>());
 }
 
-void delay(int i) {
-    while (i--) {
-        bool sleep_done = false;
-        const auto sleep_start = get_timestamp();
-        auto time_now = get_timestamp();
-        const uint64_t sleep_cycles = 1000 * 1000 * 1000;
-        while (sleep_start - time_now < sleep_cycles) {
-            time_now = get_timestamp();
-        }
-    }
-}
-
 class packet_queue_state_t;
 class packet_input_queue_state_t;
 class packet_output_queue_state_t;