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Fix transpose HC interleaved row major PCC issues when reading from DRAM #14372

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sjameelTT opened this issue Oct 28, 2024 · 0 comments
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Fix transpose HC interleaved row major PCC issues when reading from DRAM #14372

sjameelTT opened this issue Oct 28, 2024 · 0 comments
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Currently we fallback to tiled when not aligned to 16, we should probably base that on buffer alignment.
@sjameelTT sjameelTT self-assigned this Oct 28, 2024
sjameelTT added a commit that referenced this issue Oct 28, 2024
@sjameelTT
#14372: fix transpose hc RM pcc errors
74aac26 
- Restriction was on alignment, which was hard coded to 16 for L1, which caused PCC issues when read from DRAM
#14370: add basic N-d permute code and support both N-d transpose and permute
- TODO: make multicore, single-core for now
sjameelTT added a commit that referenced this issue Oct 28, 2024
@sjameelTT
#14372: fix transpose hc RM pcc errors
cba4d60 
- Restriction was on alignment, which was hard coded to 16 for L1, which caused PCC issues when read from DRAM
#14370: add basic N-d permute code and support both N-d transpose and permute
- TODO: make multicore, single-core for now
sjameelTT added a commit that referenced this issue Oct 28, 2024
@sjameelTT
#14372: fix transpose hc RM pcc errors
ef3cbf4 
- Restriction was on alignment, which was hard coded to 16 for L1, which caused PCC issues when read from DRAM
#14370: add basic N-d permute code and support both N-d transpose and permute
- TODO: make multicore, single-core for now
@sjameelTT sjameelTT mentioned this issue Oct 28, 2024
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sjameelTT added a commit that referenced this issue Oct 30, 2024
@sjameelTT
#14372: fix transpose hc RM pcc errors
eef0c50 
- Restriction was on alignment, which was hard coded to 16 for L1, which caused PCC issues when read from DRAM
#14370: add basic N-d permute code and support both N-d transpose and permute
- TODO: make multicore, single-core for now
sjameelTT added a commit that referenced this issue Oct 31, 2024
@sjameelTT
#14372: fix transpose hc RM pcc errors
d185593 
- Restriction was on alignment, which was hard coded to 16 for L1, which caused PCC issues when read from DRAM
#14370: add basic N-d permute code and support both N-d transpose and permute
- TODO: make multicore, single-core for now
sjameelTT added a commit that referenced this issue Oct 31, 2024
@sjameelTT
#14372: fix transpose hc RM pcc errors
b98fa81 
- Restriction was on alignment, which was hard coded to 16 for L1, which caused PCC issues when read from DRAM
#14370: add basic N-d permute code and support both N-d transpose and permute
- TODO: make multicore, single-core for now
sjameelTT added a commit that referenced this issue Oct 31, 2024
@sjameelTT
#14372: fix transpose hc RM pcc errors + add N-dimensional permute si…
89aa76d 
…ngle core implementation (#14388)

#14372: fix transpose hc RM pcc errors
- Restriction was on alignment, which was hard coded to 16 for L1, which caused PCC issues when read from DRAM
#14370: add basic N-d permute code and support both N-d transpose and permute
- TODO: make multicore, single-core for now
o2buzzle pushed a commit that referenced this issue Nov 4, 2024
@sjameelTT @o2buzzle
#14372: fix transpose hc RM pcc errors + add N-dimensional permute si…
3349113 
…ngle core implementation (#14388)

#14372: fix transpose hc RM pcc errors
- Restriction was on alignment, which was hard coded to 16 for L1, which caused PCC issues when read from DRAM
#14370: add basic N-d permute code and support both N-d transpose and permute
- TODO: make multicore, single-core for now
ct-clmsn pushed a commit to ct-clmsn/tt-metal that referenced this issue Nov 12, 2024
@sjameelTT
tenstorrent#14372: fix transpose hc RM pcc errors + add N-dimensional…
3cc13b2 
… permute single core implementation (tenstorrent#14388)

tenstorrent#14372: fix transpose hc RM pcc errors
- Restriction was on alignment, which was hard coded to 16 for L1, which caused PCC issues when read from DRAM
tenstorrent#14370: add basic N-d permute code and support both N-d transpose and permute
- TODO: make multicore, single-core for now
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