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Add loongarch64 support
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Signed-off-by: zhaixiaojuan <zhaixiaojuan@loongson.cn>
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zhaixiaojuan committed Nov 11, 2022
1 parent a10a36d commit 30074ec
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Showing 3 changed files with 34 additions and 14 deletions.
3 changes: 3 additions & 0 deletions src/backtrace/frame_pointer.rs
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,9 @@ impl super::Trace for Trace {
#[cfg(all(target_arch = "riscv64", target_os = "linux"))]
let frame_pointer = unsafe { (*ucontext).uc_mcontext.__gregs[libc::REG_S0] as usize };

#[cfg(all(target_arch = "loongarch64", target_os = "linux"))]
let frame_pointer = unsafe { (*ucontext).uc_mcontext.sc_regs[22] as usize };

let mut frame_pointer = frame_pointer as *mut FramePointerLayout;

let mut last_frame_pointer: *mut FramePointerLayout = null_mut();
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12 changes: 8 additions & 4 deletions src/backtrace/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,8 @@ pub trait Trace {
any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
),
feature = "frame-pointer"
)))]
Expand All @@ -57,7 +58,8 @@ mod backtrace_rs;
any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
),
feature = "frame-pointer"
)))]
Expand All @@ -67,7 +69,8 @@ pub use backtrace_rs::Trace as TraceImpl;
any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
),
feature = "frame-pointer"
))]
Expand All @@ -76,7 +79,8 @@ pub mod frame_pointer;
any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
),
feature = "frame-pointer"
))]
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33 changes: 23 additions & 10 deletions src/profiler.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,8 @@ use smallvec::SmallVec;
#[cfg(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
))]
use findshlibs::{Segment, SharedLibrary, TargetSharedLibrary};

Expand All @@ -36,7 +37,8 @@ pub struct Profiler {
#[cfg(all(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
)))]
blocklist_segments: Vec<(usize, usize)>,
}
Expand All @@ -47,7 +49,8 @@ pub struct ProfilerGuardBuilder {
#[cfg(all(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
)))]
blocklist_segments: Vec<(usize, usize)>,
}
Expand All @@ -60,7 +63,8 @@ impl Default for ProfilerGuardBuilder {
#[cfg(all(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
)))]
blocklist_segments: Vec::new(),
}
Expand All @@ -75,7 +79,8 @@ impl ProfilerGuardBuilder {
#[cfg(all(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
)))]
pub fn blocklist<T: AsRef<str>>(self, blocklist: &[T]) -> Self {
let blocklist_segments = {
Expand Down Expand Up @@ -124,7 +129,8 @@ impl ProfilerGuardBuilder {
#[cfg(all(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
)))]
{
profiler.blocklist_segments = self.blocklist_segments;
Expand Down Expand Up @@ -261,7 +267,8 @@ impl Drop for ErrnoProtector {
not(all(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
))),
allow(unused_variables)
)]
Expand All @@ -277,7 +284,8 @@ extern "C" fn perf_signal_handler(
#[cfg(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
))]
if !ucontext.is_null() {
let ucontext: *mut libc::ucontext_t = ucontext as *mut libc::ucontext_t;
Expand Down Expand Up @@ -312,6 +320,9 @@ extern "C" fn perf_signal_handler(
#[cfg(all(target_arch = "riscv64", target_os = "linux"))]
let addr = unsafe { (*ucontext).uc_mcontext.__gregs[libc::REG_PC] as usize };

#[cfg(all(target_arch = "loongarch64", target_os = "linux"))]
let addr = unsafe { (*ucontext).uc_mcontext.sc_pc as usize };

if profiler.is_blocklisted(addr) {
return;
}
Expand Down Expand Up @@ -362,7 +373,8 @@ impl Profiler {
#[cfg(all(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
)))]
blocklist_segments: Vec::new(),
})
Expand All @@ -371,7 +383,8 @@ impl Profiler {
#[cfg(all(any(
target_arch = "x86_64",
target_arch = "aarch64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "loongarch64"
)))]
fn is_blocklisted(&self, addr: usize) -> bool {
for libs in &self.blocklist_segments {
Expand Down

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