[space] Remove space-tab at beginning of line

titzer · Dec 16, 2024 · 297cd39 · 297cd39
1 parent 0c2296b
commit 297cd39
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Showing 3 changed files with 10 additions and 10 deletions.
diff --git a/src/engine/CodeValidator.v3 b/src/engine/CodeValidator.v3
@@ -485,7 +485,7 @@ class CodeValidator(extensions: Extension.set, limits: Limits, module: Module, e
 					if (g == null) return;
 					if (!g.mutable) {
 						err_atpc().IllegalAssignmentToImmutableGlobal(g.global_index);
- 					}
+					}
 					popE(g.valtype);
 				}
 				TABLE_GET => {

diff --git a/src/engine/v3/V3Interpreter.v3 b/src/engine/v3/V3Interpreter.v3
@@ -1202,15 +1202,15 @@ class V3Interpreter extends WasmStack {
 	// Atomic load
 	def doAtomicLoadReg<T>(size: byte) -> MaybeTrap<Range<byte>> {
 	    	var memarg = codeptr.read_MemArg();
- 		var memory = frame.func.instance.memories[memarg.memory_index];
- 		var index = popa(memory.decl.size);
+		var memory = frame.func.instance.memories[memarg.memory_index];
+		var index = popa(memory.decl.size);
 		return memory.range_oil_64(memarg.offset, index, size);
- 	}
- 	def doAtomicLoad<T>(size: byte, read: Range<byte> -> T, box: T -> Value) {
- 		var t = doAtomicLoadReg(size);
- 		if (t.reason != TrapReason.NONE) return void(trap(t.reason));
- 		else push(box(read(t.result))); // Suppose "read" function is atomic in Virgil.
- 	}
+	}
+	def doAtomicLoad<T>(size: byte, read: Range<byte> -> T, box: T -> Value) {
+		var t = doAtomicLoadReg(size);
+		if (t.reason != TrapReason.NONE) return void(trap(t.reason));
+		else push(box(read(t.result))); // Suppose "read" function is atomic in Virgil.
+	}
 	def doLoadLane<T>(size: byte, log2_size: u3, read: Range<byte> -> T) {
 		var v = pops();
 		var t = doLoadReg(size);

diff --git a/src/engine/x86-64/X86_64Interpreter.v3 b/src/engine/x86-64/X86_64Interpreter.v3
@@ -3062,7 +3062,7 @@ class X86_64InterpreterGen(ic: X86_64InterpreterCode, w: DataWriter) {
 		genSimdUnop_xx_x(Opcode.F32X4_DEMOTE_F64X2_ZERO, asm.cvtpd2ps_s_s);
 		genSimdUnop_x_x(Opcode.I32X4_TRUNC_SAT_F32X4_S, masm.emit_i32x4_trunc_sat_f32x4_s(_, r_xmm1));
 		genSimdUnop_x_x(Opcode.I32X4_TRUNC_SAT_F32X4_U, masm.emit_i32x4_trunc_sat_f32x4_u(_, r_xmm1, r_xmm2));
- 		genSimdUnop_x_x(Opcode.I32X4_TRUNC_SAT_F64X2_S_ZERO, masm.emit_i32x4_trunc_sat_f64x2_s_zero(_, r_tmp0, r_xmm1, r_xmm2));
+		genSimdUnop_x_x(Opcode.I32X4_TRUNC_SAT_F64X2_S_ZERO, masm.emit_i32x4_trunc_sat_f64x2_s_zero(_, r_tmp0, r_xmm1, r_xmm2));
 		genSimdUnop_x_x(Opcode.I32X4_TRUNC_SAT_F64X2_U_ZERO, masm.emit_i32x4_trunc_sat_f64x2_u_zero(_, r_tmp0, r_xmm1, r_xmm2));
 		genSimdUnop_xxtmp_x(Opcode.F64X2_CONVERT_LOW_I32X4_U, masm.emit_f64x2_convert_low_i32x4_u(_, r_tmp0, _));
 		genSimdUnop_x_x(Opcode.I16X8_EXTEND_HIGH_I8X16_S, masm.emit_i16x8_s_convert_i8x16_high);