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[v3i/simd]: Implement v128 floating-point rounding instructions (#133
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…from haoyu-zc/v3i-rounding)
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titzer authored Nov 6, 2023
2 parents 0e4bbfb + e65703e commit 478c072
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Showing 2 changed files with 25 additions and 1 deletion.
16 changes: 16 additions & 0 deletions src/engine/V3Eval.v3
Original file line number Diff line number Diff line change
Expand Up @@ -379,6 +379,10 @@ component V3Eval {
def F32X4_DIV = do_vv_v_x4(_, _, F32_DIV_U);
def F32X4_NEG = do_v_v_x4(_, F32_NEG_U);
def F32X4_SQRT = do_v_v_x4(_, F32_SQRT_U);
def F32X4_CEIL = do_v_v_x4(_, V128_F32_CEIL);
def F32X4_FLOOR = do_v_v_x4(_, V128_F32_FLOOR);
def F32X4_TRUNC = do_v_v_x4(_, V128_F32_TRUNC);
def F32X4_NEAREST = do_v_v_x4(_, V128_F32_NEAREST);
def F32X4_EQ = do_vv_v_x4(_, _, V128_F32X4_EQ);
def F32X4_NE = do_vv_v_x4(_, _, V128_F32X4_NE);
def F32X4_LT = do_vv_v_x4(_, _, V128_F32X4_LT);
Expand All @@ -396,6 +400,10 @@ component V3Eval {
def F64X2_DIV = do_vv_v_x2(_, _, F64_DIV_U);
def F64X2_NEG = do_v_v_x2(_, F64_NEG_U);
def F64X2_SQRT = do_v_v_x2(_, F64_SQRT_U);
def F64X2_CEIL = do_v_v_x2(_, V128_F64_CEIL);
def F64X2_FLOOR = do_v_v_x2(_, V128_F64_FLOOR);
def F64X2_TRUNC = do_v_v_x2(_, V128_F64_TRUNC);
def F64X2_NEAREST = do_v_v_x2(_, V128_F64_NEAREST);
def F64X2_EQ = do_vv_v_x2(_, _, V128_F64X2_EQ);
def F64X2_NE = do_vv_v_x2(_, _, V128_F64X2_NE);
def F64X2_LT = do_vv_v_x2(_, _, V128_F64X2_LT);
Expand Down Expand Up @@ -475,12 +483,20 @@ def F32_MUL_U = do_ff_f(_, _, float.*);
def F32_DIV_U = do_ff_f(_, _, float./);
def F32_NEG_U = do_f_f(_, V3Eval.F32_NEG);
def F32_SQRT_U = do_f_f(_, float.sqrt);
def V128_F32_CEIL = do_f_f(_, V3Eval.F32_CEIL);
def V128_F32_FLOOR = do_f_f(_, V3Eval.F32_FLOOR);
def V128_F32_TRUNC = do_f_f(_, V3Eval.F32_TRUNC);
def V128_F32_NEAREST = do_f_f(_, float.round);
def F64_ADD_U = do_dd_d(_, _, double.+);
def F64_SUB_U = do_dd_d(_, _, double.-);
def F64_MUL_U = do_dd_d(_, _, double.*);
def F64_DIV_U = do_dd_d(_, _, double./);
def F64_NEG_U = do_d_d(_, V3Eval.F64_NEG);
def F64_SQRT_U = do_d_d(_, double.sqrt);
def V128_F64_CEIL = do_d_d(_, V3Eval.F64_CEIL);
def V128_F64_FLOOR = do_d_d(_, V3Eval.F64_FLOOR);
def V128_F64_TRUNC = do_d_d(_, V3Eval.F64_TRUNC);
def V128_F64_NEAREST = do_d_d(_, double.round);

def V128_I8_MIN_S = do_ii_i_8(_, _, I8_MIN_S);
def V128_I16_MIN_S = do_ii_i_16(_, _, I16_MIN_S);
Expand Down
10 changes: 9 additions & 1 deletion src/engine/v3/V3Interpreter.v3
Original file line number Diff line number Diff line change
Expand Up @@ -1015,6 +1015,10 @@ component V3Interpreter {
F32X4_DIV => do_vv_v(V3Eval.F32X4_DIV);
F32X4_NEG => do_v_v(V3Eval.F32X4_NEG);
F32X4_SQRT => do_v_v(V3Eval.F32X4_SQRT);
F32X4_CEIL => do_v_v(V3Eval.F32X4_CEIL);
F32X4_FLOOR => do_v_v(V3Eval.F32X4_FLOOR);
F32X4_TRUNC => do_v_v(V3Eval.F32X4_TRUNC);
F32X4_NEAREST => do_v_v(V3Eval.F32X4_NEAREST);
F32X4_EQ => do_vv_v(V3Eval.F32X4_EQ);
F32X4_NE => do_vv_v(V3Eval.F32X4_NE);
F32X4_LT => do_vv_v(V3Eval.F32X4_LT);
Expand All @@ -1030,8 +1034,12 @@ component V3Interpreter {
F64X2_SUB => do_vv_v(V3Eval.F64X2_SUB);
F64X2_MUL => do_vv_v(V3Eval.F64X2_MUL);
F64X2_DIV => do_vv_v(V3Eval.F64X2_DIV);
F64X2_SQRT => do_v_v(V3Eval.F64X2_SQRT);
F64X2_NEG => do_v_v(V3Eval.F64X2_NEG);
F64X2_SQRT => do_v_v(V3Eval.F64X2_SQRT);
F64X2_CEIL => do_v_v(V3Eval.F64X2_CEIL);
F64X2_FLOOR => do_v_v(V3Eval.F64X2_FLOOR);
F64X2_TRUNC => do_v_v(V3Eval.F64X2_TRUNC);
F64X2_NEAREST => do_v_v(V3Eval.F64X2_NEAREST);
F64X2_EQ => do_vv_v(V3Eval.F64X2_EQ);
F64X2_NE => do_vv_v(V3Eval.F64X2_NE);
F64X2_LT => do_vv_v(V3Eval.F64X2_LT);
Expand Down

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