stlink-common: Update STM32L0 and STM32L1 loader ABI

This patch invert source and destination registers in the stm32l0 and stm32l1 loaders, so that it follows the same ABI as other stm32 loaders. Doing that, the run_flash_loader() function can be simplified a little. Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
tomdeboer · Mar 14, 2016 · 907383d · 907383d
1 parent 5693181
commit 907383d
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Showing 3 changed files with 23 additions and 31 deletions.
diff --git a/flashloaders/stm32l0x.s b/flashloaders/stm32l0x.s
@@ -34,8 +34,8 @@
     .global write
 
 /*
-    r0 - destination address
-    r1 - source address
+    r0 - source address
+    r1 - destination address
     r2 - count
 */
 
@@ -46,9 +46,9 @@
 
 write_word:
     // Load one word from address in r0, increment by 4
-    ldr    r4, [r1]
+    ldr    r4, [r0]
     // Store the word to address in r1, increment by 4
-    str    r4, [r0]
+    str    r4, [r1]
     // Increment r3
     adds    r3, #1
 	adds	r1, #4

diff --git a/flashloaders/stm32lx.s b/flashloaders/stm32lx.s
@@ -34,8 +34,8 @@
     .global write
 
 /*
-    r0 - destination address
-    r1 - source address
+    r0 - source address
+    r1 - destination address
     r2 - count
 */
 
@@ -46,9 +46,9 @@
 
 write_word:
     // Load one word from address in r0, increment by 4
-    ldr.w    ip, [r1], #4
+    ldr.w    ip, [r0], #4
     // Store the word to address in r1, increment by 4
-    str.w    ip, [r0], #4
+    str.w    ip, [r1], #4
     // Increment r3
     adds    r3, #1
 

diff --git a/src/stlink-common.c b/src/stlink-common.c
@@ -1501,17 +1501,17 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
     static const uint8_t loader_code_stm32l[] = {
 
         /* openocd.git/contrib/loaders/flash/stm32lx.S
-           r0, input, dest addr
-           r1, input, source addr
+           r0, input, source addr
+           r1, input, dest addr
            r2, input, word count
            r3, output, word count
            */
 
         0x00, 0x23,
         0x04, 0xe0,
 
-        0x51, 0xf8, 0x04, 0xcb,
-        0x40, 0xf8, 0x04, 0xcb,
+        0x50, 0xf8, 0x04, 0xcb,
+        0x41, 0xf8, 0x04, 0xcb,
         0x01, 0x33,
 
         0x93, 0x42,
@@ -1522,17 +1522,17 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
     static const uint8_t loader_code_stm32l0[] = {
 
         /*
-           r0, input, dest addr
-           r1, input, source addr
+           r0, input, source addr
+           r1, input, dest addr
            r2, input, word count
            r3, output, word count
          */
 
         0x00, 0x23,
         0x04, 0xe0,
 
-        0x0c, 0x68,
-        0x04, 0x60,
+        0x04, 0x68,
+        0x0c, 0x60,
         0x01, 0x33,
         0x04, 0x31,
         0x04, 0x30,
@@ -2064,7 +2064,7 @@ int stlink_fwrite_flash(stlink_t *sl, const char* path, stm32_addr_t addr) {
 int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, const uint8_t* buf, size_t size) {
 
     reg rr;
-    int target_reg, source_reg, i = 0;
+    int i = 0;
     size_t count;
 
     DLOG("Running flash loader, write address:%#x, size: %zd\n", target, size);
@@ -2075,36 +2075,28 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons
         return -1;
     }
 
-    if (sl->flash_type == FLASH_TYPE_L0) {
-        count = size / sizeof(uint32_t);
-        if (size % sizeof(uint32_t))
-            ++count;
-        target_reg = 0;
-        source_reg = 1;
-    } else if (sl->flash_type == FLASH_TYPE_F0) {
+    if (sl->flash_type == FLASH_TYPE_F0) {
         count = size / sizeof(uint16_t);
         if (size % sizeof(uint16_t))
             ++count;
-        target_reg = 1;
-        source_reg = 0;
-    } else if (sl->flash_type == FLASH_TYPE_F4 || sl->flash_type == FLASH_TYPE_L4) {
+    } else if (sl->flash_type == FLASH_TYPE_F4 ||
+            sl->flash_type == FLASH_TYPE_L4 ||
+            sl->flash_type == FLASH_TYPE_L0) {
         count = size / sizeof(uint32_t);
         if (size % sizeof(uint32_t))
             ++count;
         if (sl->chip_id == STM32_CHIPID_L4) {
             if (count % 2)
                 ++count;
         }
-        target_reg = 1;
-        source_reg = 0;
     } else {
         fprintf(stderr, "unknown coreid 0x%x, don't know what flash loader to use\n", sl->core_id);
         return -1;
     }
 
     /* setup core */
-    stlink_write_reg(sl, fl->buf_addr, source_reg); /* source */
-    stlink_write_reg(sl, target, target_reg); /* target */
+    stlink_write_reg(sl, fl->buf_addr, 0); /* source */
+    stlink_write_reg(sl, target, 1); /* target */
     stlink_write_reg(sl, count, 2); /* count */
     stlink_write_reg(sl, 0, 3); /* flash bank 0 (input), only used on F0, but armless fopr others */
     stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */