A ZipCPU SoC for the Nexys Video board supporting video functionality
-
Updated
Nov 13, 2024 - Verilog
A ZipCPU SoC for the Nexys Video board supporting video functionality
VeeRwolf (a platform for the VeeR family of RISC-V cores) for Nexys Video Board: https://github.com/chipsalliance/VeeRwolf
Add a description, image, and links to the nexys-video topic page so that developers can more easily learn about it.
To associate your repository with the nexys-video topic, visit your repo's landing page and select "manage topics."