#
psg
Here are 48 public repositories matching this topic...
Z80 ASM library (and C conversion/compression tools) to allow replay of SN76489 VGMs as background music/SFX in SEGA Master System / SEGA Game Gear homebrew programs
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Apr 4, 2024 - Assembly
[IEEE JBHI] "MultiChannelSleepNet: A Transformer-Based Model for Automatic Sleep Stage Classification With PSG"
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Jun 19, 2023 - Python
Nano Drive is a VGM format player works with Longan Nano. This supports YM2151 and YMZ294 PSG.
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Jun 29, 2021 - C
EEGLAB-compatible analysis software for manual / visual sleep stage scoring, signal processing and event marking of polysomnographic (PSG) data for MATLAB.
signal-processing eeg sleep event-detection psg eeglab sleep-research sleep-analysis eeg-signals-processing sleep-staging sleep-stage-scoring sleep-scoring polysomnography eeg-preprocessing
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Nov 13, 2024 - MATLAB
A performant web-based EDF viewer, assessment and collaboration tool for multidimensional biosignals
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Jan 9, 2023 - JavaScript
Modern ES6 javascript class module worker worklet for AY-3-8910 and YM2149 emulation. With different backends AYUMI and Demozoo as start and readers for FYM, VTX, PSG, YM also includes modern UZIP, LHA, LH4 modules/classes
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Mar 26, 2024 - JavaScript
Basic test code for the Microchip AY8930 sound chip connected to an Arduino.
arduino microchip psg generating-sounds general-instruments ay-3-8910 ay8930 programmable-sound-generator
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May 29, 2024 - C++
This sketch plays PSG files via a AY-3-8910 PSG chip which is a 3-voice programmable sound generator (PSG). Uses the Arduino Pro Mini microcontroller board and works on the ATmega328 or 168
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Mar 31, 2023 - C++
[SG2RL@ICCV 2023] Code for our paper "Haystack: A Panoptic Scene Graph Dataset to Evaluate Rare Predicate Classes"
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Oct 20, 2023 - Python
Method for detecting sleep spindles using EEGlab functions and datasets
eeg sleep event-detection psg eeglab sleep-spindles sleep-research sleep-analysis eeg-signals-processing polysomnography
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Dec 25, 2023 - MATLAB
YM2149 / AY-3-8910 Programmable Sound Generator in SystemVerilog and Verilog. Offers dual PSGs, programmable stereo mixer with bass and treble controls, standard I2S 44.1KHz or 48KHz 16-bit digital audio out, and built-in floating point system clock divider/generator.
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Sep 8, 2022 - SystemVerilog
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