Verilog implementation of a DFS search and RISC-V processor in Single-Cycle, Multi-Cycle and Pipeline
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Updated
Mar 25, 2024 - Verilog
Verilog implementation of a DFS search and RISC-V processor in Single-Cycle, Multi-Cycle and Pipeline
This project aims to boot Linux on a RocektChip based SoC, synthesised on the DE10-Nano board. Computer Science Bachelor's Thesis at UAB, Spain.
RISC-V 3 stage in-order pipeline in verilog
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