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superscalar

Here are 2 public repositories matching this topic...

ucb-bar / chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

boom rocket rocket-chip chip-generator chisel riscv rtl peripherals soc out-of-order superscalar risc-v firesim accelerators chipyard hwacha

Updated Jan 3, 2025
Scala

mark-i-m / riscy

Superscalar OoO RISCV processor written in Chisel

core processor chisel riscv out-of-order superscalar

Updated Jan 3, 2017
Scala

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