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Merge pull request #14 from tweedegolf/probe-rs-release
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Switched probe-rs back to the last release so that it can be integrated with probe-run
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diondokter authored Jun 20, 2022
2 parents 7d4ec28 + 8c2600e commit 04bcf8d
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Showing 5 changed files with 97 additions and 62 deletions.
82 changes: 54 additions & 28 deletions Cargo.lock

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3 changes: 2 additions & 1 deletion capture-probe/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@ description = "Crate for capturing stack dumps of embedded devices with a debugg
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html

[dependencies]
probe-rs = { git = "https://github.com/probe-rs/probe-rs", rev = "2fa97dc" }
# probe-rs = { git = "https://github.com/probe-rs/probe-rs", rev = "2fa97dc" }
probe-rs = "0.12"
stackdump-core = { version = "0.1.3", path = "../core", default-features = false }

47 changes: 26 additions & 21 deletions capture-probe/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ impl<'a, 'probe> StackdumpCapturer<'a, 'probe> {
let mut register_data = Vec::new();
let registers = self.0.get_mut().registers();

for register in registers.platform_registers() {
for register in registers.registers() {
register_data.push(self.0.get_mut().read_core_reg(register)?)
}

Expand All @@ -27,29 +27,30 @@ impl<'a, 'probe> StackdumpCapturer<'a, 'probe> {
Ok(VecRegisterData::new(starting_register, register_data))
}

pub fn capture_fpu_registers(
&mut self,
) -> Result<Option<VecRegisterData<u32>>, probe_rs::Error> {
let registers = self.0.get_mut().registers();
// Available on probe-rs master:
// pub fn capture_fpu_registers(
// &mut self,
// ) -> Result<Option<VecRegisterData<u32>>, probe_rs::Error> {
// let registers = self.0.get_mut().registers();

match registers.fpu_registers() {
Some(fpu_registers) => {
let mut register_data = Vec::new();
// match registers.fpu_registers() {
// Some(fpu_registers) => {
// let mut register_data = Vec::new();

for register in fpu_registers {
register_data.push(self.0.get_mut().read_core_reg(register)?)
}
// for register in fpu_registers {
// register_data.push(self.0.get_mut().read_core_reg(register)?)
// }

let starting_register = match self.0.get_mut().architecture() {
probe_rs::Architecture::Arm => stackdump_core::gimli::Arm::S0,
probe_rs::Architecture::Riscv => stackdump_core::gimli::RiscV::F0,
};
// let starting_register = match self.0.get_mut().architecture() {
// probe_rs::Architecture::Arm => stackdump_core::gimli::Arm::S0,
// probe_rs::Architecture::Riscv => stackdump_core::gimli::RiscV::F0,
// };

Ok(Some(VecRegisterData::new(starting_register, register_data)))
}
None => Ok(None),
}
}
// Ok(Some(VecRegisterData::new(starting_register, register_data)))
// }
// None => Ok(None),
// }
// }
}

impl<'a, 'probe> MemoryRegion for StackdumpCapturer<'a, 'probe> {
Expand All @@ -60,7 +61,11 @@ impl<'a, 'probe> MemoryRegion for StackdumpCapturer<'a, 'probe> {
let mut buffer = vec![0; address_range.clone().count()];

// Truncating to u32 is alright because probe-rs only supports 32-bit devices
match self.0.borrow_mut().read(address_range.start, &mut buffer) {
match self
.0
.borrow_mut()
.read(address_range.start as _, &mut buffer)
{
Ok(_) => Ok(Some(buffer)),
Err(e) => Err(MemoryReadError(Rc::new(e))),
}
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2 changes: 1 addition & 1 deletion cli/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -21,4 +21,4 @@ simple_logger = "2.1.0"
log = "0.4.14"
termsize = "0.1"
colored = "2"
probe-rs = { git = "https://github.com/probe-rs/probe-rs", rev = "2fa97dc" }
probe-rs = "0.12"
25 changes: 14 additions & 11 deletions cli/src/probe.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
use crate::Arguments;
use probe_rs::{config::TargetSelector, DebugProbeSelector, Permissions, Probe, Session};
use probe_rs::{config::TargetSelector, Architecture, DebugProbeSelector, Probe, Session};
use stackdump_capture_probe::StackdumpCapturer;
use stackdump_trace::{
platform::cortex_m::CortexMPlatform, stackdump_core::device_memory::DeviceMemory,
Expand All @@ -16,29 +16,32 @@ pub(crate) fn trace_probe(
let elf_data = std::fs::read(elf_file)?;

let mut session = match probe_selector {
Some(selector) => Probe::open(selector)?.attach(target_selector, Permissions::default())?,
None => Session::auto_attach(target_selector, Permissions::default())?,
Some(selector) => Probe::open(selector)?.attach(target_selector)?,
None => Session::auto_attach(target_selector)?,
};
let mut core = session.core(core.unwrap_or(0))?;

let core_type = core.core_type();
let fpu_supported = core.fpu_support()?;
// TODO on master: Change this to use the core_type
let core_type = core.architecture();
// TODO on master
// let fpu_supported = core.fpu_support()?;
core.halt(Duration::from_secs(2))?;

let mut stackcapturer = StackdumpCapturer::new(&mut core);

let mut device_memory = DeviceMemory::new();
device_memory.add_register_data(stackcapturer.capture_core_registers()?);

if fpu_supported {
if let Some(fpu_registers) = stackcapturer.capture_fpu_registers()? {
device_memory.add_register_data(fpu_registers);
}
}
// TODO on master
// if fpu_supported {
// if let Some(fpu_registers) = stackcapturer.capture_fpu_registers()? {
// device_memory.add_register_data(fpu_registers);
// }
// }

device_memory.add_memory_region(stackcapturer);

if core_type.is_cortex_m() {
if matches!(core_type, Architecture::Arm) {
let frames = stackdump_trace::platform::trace::<CortexMPlatform>(device_memory, &elf_data)?;
crate::print_frames(frames, args);
} else {
Expand Down

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