Merge pull request #2666 from hirooih/sv-parameter-property

SystemVerilog: support property:parameter (update for #2537)

Makefile.am

@@ -221,6 +221,7 @@ man_MANS = \
 	man/ctags-optlib.7 \
 	\
 	man/ctags-lang-python.7 \
+	man/ctags-lang-verilog.7 \
 	\
 	$(NULL)
 rst2man_verbose = $(rst2man_verbose_@AM_V@)

Tmain/list-fields-with-prefix.d/stdout-expected.txt

@@ -34,3 +34,5 @@ x       UCTAGSxpath          no      NONE             s--    no    xpath for the
 -       UCTAGSassignmentop   no      R                s--    no    operator for assignment
 -       UCTAGSsectionMarker  no      ReStructuredText s--    no    character used for declaring section
 -       UCTAGSmixin          yes     Ruby             s--    no    how the class or module is mixed in (mixin:HOW:MODULE)
+-       UCTAGSparameter      no      SystemVerilog    --b    no    parameter whose value can be overridden.
+-       UCTAGSparameter      no      Verilog          --b    no    parameter whose value can be overridden.

Tmain/list-fields.d/stdout-expected.txt

@@ -52,6 +52,8 @@ z	kind	no	NONE	s--	no	[tags output] prepend "kind:" to k/ (or K/) field output,
 -	assignmentop	no	R	s--	no	operator for assignment
 -	sectionMarker	no	ReStructuredText	s--	no	character used for declaring section
 -	mixin	yes	Ruby	s--	no	how the class or module is mixed in (mixin:HOW:MODULE)
+-	parameter	no	SystemVerilog	--b	no	parameter whose value can be overridden.
+-	parameter	no	Verilog	--b	no	parameter whose value can be overridden.
 #
 Foo	input.java	/^abstract public class Foo extends Bar$/
 x	input.java	/^    public int x;$/

Units/parser-verilog.r/systemverilog-parameter.d/args.ctags

@@ -1 +1,2 @@
 --sort=no
+--fields-SystemVerilog=+{parameter}

Units/parser-verilog.r/systemverilog-parameter.d/input.sv

@@ -55,10 +55,10 @@ endclass
 
 class Fifo #(type T = logic, int DEPTH = 1) implements PutImp#(T), GetImp#(T);
   T myFifo[$:DEPTH-1];
-  virtual function void put(T a); // FIXME : to be ignored
+  virtual function void put(T a); // FIXME : to be ignored?
     myFifo.push_back(a);
   endfunction
-  virtual function T get(); // FIXME : to be ignored
+  virtual function T get(); // FIXME : to be ignored?
     get = myFifo.pop_front();
   endfunction
 endclass
@@ -94,3 +94,103 @@ module user_defined_type_param
   #(int_t num_code_bits = 3, localparam num_out_bits = 1 << num_code_bits)
    (input [num_code_bits-1:0] A, output reg [num_out_bits-1:0] Y);
 endmodule
+
+//
+// LRM 6.20.1 Parameter declaration syntax (#2537)
+//
+
+// compilation unit scope
+parameter L1 = 0;  //  synonym for the localparam
+
+module module_with_parameter_port_list #(P1, P2, localparam L2 = P1+1, L3=P2*2, parameter P3, P4)
+( /*port list...*/ );
+  parameter  L4 = "local parameter";  // synonym for the localparam
+  localparam L5 = "local parameter";
+  // ...
+endmodule
+
+module module_with_empty_parameter_port_list #()
+( /*port list...*/ );
+  parameter  L6 = "local parameter";  // synonym for the localparam
+  localparam L7 = "local parameter";
+  // ...
+endmodule
+
+module module_no_parameter_port_list
+( /*port list...*/ );
+  parameter  P5 = "parameter";
+  localparam L8 = "local parameter";
+  // ...
+endmodule
+
+class class_with_parameter_port_list #(P1, P2, localparam L2 = P1+1, L3=P2*2, parameter P3, P4);
+  parameter  L4 = "local parameter";  // synonym for the localparam
+  localparam L5 = "local parameter";
+  // ...
+endclass
+
+class class_with_empty_parameter_port_list #();
+  parameter  L6 = "local parameter";  // synonym for the localparam
+  localparam L7 = "local parameter";
+  // ...
+endclass
+
+class class_no_parameter_port_list;
+  parameter  L8 = "local parameter";  // synonym for the localparam (class only)
+  localparam L9 = "local parameter";
+  // ...
+endclass
+
+program program_with_parameter_port_list #(P1, P2, localparam L2 = P1+1, L3=P2*2, parameter P3, P4)
+( /*port list...*/ );
+  parameter  L4 = "local parameter";  // synonym for the localparam
+  localparam L5 = "local parameter";
+  // ...
+endprogram
+
+program program_with_empty_parameter_port_list #()
+( /*port list...*/ );
+  parameter  L6 = "local parameter";  // synonym for the localparam
+  localparam L7 = "local parameter";
+  // ...
+endprogram
+
+program program_no_parameter_port_list
+( /*port list...*/ );
+  parameter  P5 = "parameter";
+  localparam L8 = "local parameter";
+  // ...
+endprogram
+
+interface interface_with_parameter_port_list #(P1, P2, localparam L2 = P1+1, L3=P2*2, parameter P3, P4)
+( /*port list...*/ );
+  parameter  L4 = "local parameter";  // synonym for the localparam
+  localparam L5 = "local parameter";
+  // ...
+endinterface
+
+interface interface_with_empty_parameter_port_list #()
+( /*port list...*/ );
+  parameter  L6 = "local parameter";  // synonym for the localparam
+  localparam L7 = "local parameter";
+  // ...
+endinterface
+
+interface interface_no_parameter_port_list
+( /*port list...*/ );
+  parameter  P5 = "parameter";
+  localparam L8 = "local parameter";
+  // ...
+endinterface
+
+package package_has_no_parameter_port_list;
+  parameter  L1 = "local parameter";
+  localparam L2 = "local parameter";
+endpackage
+
+module generate_constructs;
+  generate
+    parameter  L1 = "local parameter";  // FIXME
+    localparam L2 = "local parameter";
+  endgenerate
+endmodule

configure.ac

@@ -725,6 +725,7 @@ AC_CONFIG_FILES([Makefile
 		 man/ctags-incompatibilities.7.rst
 		 man/ctags-optlib.7.rst
 		 man/ctags-lang-python.7.rst
+		 man/ctags-lang-verilog.7.rst
 		 man/readtags.1.rst
 		 ])
 

docs/man-pages.rst

@@ -11,6 +11,7 @@ Man pages
 	ctags-client-tools(7) <man/ctags-client-tools.7.rst>
 	ctags-incompatibilities(7) <man/ctags-incompatibilities.7.rst>
 	ctags-lang-python(7) <man/ctags-lang-python.7.rst>
+	ctags-lang-verilog(7) <man/ctags-lang-verilog.7.rst>
 	ctags-optlib(7) <man/ctags-optlib.7.rst>
 	readtags(1) <man/readtags.1.rst>
 	tags(5) <man/tags.5.rst>

docs/man/ctags-lang-verilog.7.rst

@@ -0,0 +1,109 @@
+.. _ctags_lang-verilog(7):
+
+======================================================================
+ctags-lang-verilog
+======================================================================
+
+:Version: 5.9.0
+:Manual group: Universal-ctags
+:Manual section: 7
+
+SYNOPSIS
+--------
+|	**ctags** ... [--fields-Verilog=+{parameter}] ...
+|	**ctags** ... [--kinds-systemverilog=+Q] [--fields-SystemVerilog=+{parameter}] ...
+|	**ctags** --list-kinds-full={Verilog|SystemVerilog}
+|	**ctags** --list-fields={Verilog|SystemVerilog}
+
+    +---------------+---------------+-------------------+
+    | Language      | Language ID   | File Mapping      |
+    +===============+===============+===================+
+    | Verilog       | Verilog       | .v                |
+    +---------------+---------------+-------------------+
+    | SystemVerilog | SystemVerilog | .sv, .svh, svi    |
+    +---------------+---------------+-------------------+
+
+DESCRIPTION
+-----------
+This man page describes about the Verilog/SystemVerilog parser for Universal-ctags.
+
+It assumes the input file is written in the correct grammer.  Otherwise output of
+ctags is undefined.
+
+``parameter`` field
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+If the field ``parameter`` is enabled, a tagfield ``parameter:`` is added on a parameter whose
+value can be overridden on an instantiated module, interface, or program.
+This is useful for a editor plugin or extension to enable auto-instatiation of modules with
+parameters which can be overridden.
+
+.. code-block:: console
+
+    $ ctags ... --fields-Verilog=+{parameter} ...
+    $ ctags ... --fields-SystemVerilog=+{parameter} ...
+
+On the following source code tagfields ``parameter:`` are added on
+parameter ``P*``, not on ``L*``.  Note that ``L4`` and ``L6`` is declared by
+``parameter`` statement, but tagfields ``parameter:`` are not added,
+because they cannot be overridden.
+
+"input.sv"
+
+.. code-block:: systemverilog
+
+	// compilation unit scope
+	parameter L1 = "synonym for the localparam";
+
+	module with_parameter_port_list #(
+		P1,
+		localparam L2 = P1+1,
+		parameter P2)
+		( /*port list...*/ );
+		parameter  L3 = "synonym for the localparam";
+		localparam L4 = "localparam";
+		// ...
+	endmodule
+
+	module with_empty_parameter_port_list #()
+		( /*port list...*/ );
+		parameter  L5 = "synonym for the localparam";
+		localparam L6 = "localparam";
+		// ...
+	endmodule
+
+	module no_parameter_port_list
+		( /*port list...*/ );
+		parameter  P3 = "parameter";
+		localparam L7 = "localparam";
+		// ...
+	endmodule
+
+"output.tags"
+with "--options=NONE --sort=no -o - --fields-SystemVerilog=+{parameter} input.sv"
+
+.. code-block:: tags
+
+	L1      foo.sv  /^parameter L1 = "synonym for the localparam";$/;"      c       parameter:
+	with_parameter_port_list foo.sv  /^module with_parameter_port_list #($/;" m
+	P1      foo.sv  /^    P1, $/;"  c       module:with_parameter_port_list  parameter:
+	L2      foo.sv  /^    localparam L2 = P1+1,$/;" c       module:with_parameter_port_list
+	P2      foo.sv  /^    parameter P2)$/;" c       module:with_parameter_port_list  parameter:
+	L3      foo.sv  /^    parameter  L3 = "synonym for the localparam";$/;" c       module:with_parameter_port_list
+	L4      foo.sv  /^    localparam L4 = "localparam";$/;" c       module:with_parameter_port_list
+	with_empty_parameter_port_list   foo.sv  /^module with_empty_parameter_port_list #()$/;"  m
+	L5      foo.sv  /^    parameter  L5 = "synonym for the localparam";$/;" c       module:with_empty_parameter_port_list
+	L6      foo.sv  /^    localparam L6 = "localparam";$/;" c       module:with_empty_parameter_port_list
+	no_parameter_port_list   foo.sv  /^module no_parameter_port_list$/;"      m
+	P3      foo.sv  /^    parameter  P3 = "parameter";$/;"  c       module:no_parameter_port_list    parameter:
+	L7      foo.sv  /^    localparam L7 = "localparam";$/;" c       module:no_parameter_port_list
+
+Known Issues
+---------------------------------------------------------------------
+
+See https://github.com/universal-ctags/ctags/issues/TBD.
+
+
+SEE ALSO
+--------
+:ref:`ctags(1) <ctags(1)>`, :ref:`ctags-client-tools(7) <ctags-client-tools(7)>`

man/Makefile

@@ -48,6 +48,7 @@ IN_SOURCE_FILES = \
 	ctags-client-tools.7.rst.in \
 	\
 	ctags-lang-python.7.rst.in \
+	ctags-lang-verilog.7.rst.in \
 	\
 	readtags.1.rst.in \
 	\

man/ctags-lang-verilog.7.rst.in

@@ -0,0 +1,109 @@
+.. _ctags_lang-verilog(7):
+
+======================================================================
+ctags-lang-verilog
+======================================================================
+
+:Version: @VERSION@
+:Manual group: Universal-ctags
+:Manual section: 7
+
+SYNOPSIS
+--------
+|	**@CTAGS_NAME_EXECUTABLE@** ... [--fields-Verilog=+{parameter}] ...
+|	**@CTAGS_NAME_EXECUTABLE@** ... [--kinds-systemverilog=+Q] [--fields-SystemVerilog=+{parameter}] ...
+|	**@CTAGS_NAME_EXECUTABLE@** --list-kinds-full={Verilog|SystemVerilog}
+|	**@CTAGS_NAME_EXECUTABLE@** --list-fields={Verilog|SystemVerilog}
+
+    +---------------+---------------+-------------------+
+    | Language      | Language ID   | File Mapping      |
+    +===============+===============+===================+
+    | Verilog       | Verilog       | .v                |
+    +---------------+---------------+-------------------+
+    | SystemVerilog | SystemVerilog | .sv, .svh, svi    |
+    +---------------+---------------+-------------------+
+
+DESCRIPTION
+-----------
+This man page describes about the Verilog/SystemVerilog parser for Universal-ctags.
+
+It assumes the input file is written in the correct grammer.  Otherwise output of
+ctags is undefined.
+
+``parameter`` field
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+If the field ``parameter`` is enabled, a tagfield ``parameter:`` is added on a parameter whose
+value can be overridden on an instantiated module, interface, or program.
+This is useful for a editor plugin or extension to enable auto-instatiation of modules with
+parameters which can be overridden.
+
+.. code-block:: console
+
+    $ ctags ... --fields-Verilog=+{parameter} ...
+    $ ctags ... --fields-SystemVerilog=+{parameter} ...
+
+On the following source code tagfields ``parameter:`` are added on
+parameter ``P*``, not on ``L*``.  Note that ``L4`` and ``L6`` is declared by
+``parameter`` statement, but tagfields ``parameter:`` are not added,
+because they cannot be overridden.
+
+"input.sv"
+
+.. code-block:: systemverilog
+
+	// compilation unit scope
+	parameter L1 = "synonym for the localparam";
+
+	module with_parameter_port_list #(
+		P1,
+		localparam L2 = P1+1,
+		parameter P2)
+		( /*port list...*/ );
+		parameter  L3 = "synonym for the localparam";
+		localparam L4 = "localparam";
+		// ...
+	endmodule
+
+	module with_empty_parameter_port_list #()
+		( /*port list...*/ );
+		parameter  L5 = "synonym for the localparam";
+		localparam L6 = "localparam";
+		// ...
+	endmodule
+
+	module no_parameter_port_list
+		( /*port list...*/ );
+		parameter  P3 = "parameter";
+		localparam L7 = "localparam";
+		// ...
+	endmodule
+
+"output.tags"
+with "--options=NONE --sort=no -o - --fields-SystemVerilog=+{parameter} input.sv"
+
+.. code-block:: tags
+
+	L1      foo.sv  /^parameter L1 = "synonym for the localparam";$/;"      c       parameter:
+	with_parameter_port_list foo.sv  /^module with_parameter_port_list #($/;" m
+	P1      foo.sv  /^    P1, $/;"  c       module:with_parameter_port_list  parameter:
+	L2      foo.sv  /^    localparam L2 = P1+1,$/;" c       module:with_parameter_port_list
+	P2      foo.sv  /^    parameter P2)$/;" c       module:with_parameter_port_list  parameter:
+	L3      foo.sv  /^    parameter  L3 = "synonym for the localparam";$/;" c       module:with_parameter_port_list
+	L4      foo.sv  /^    localparam L4 = "localparam";$/;" c       module:with_parameter_port_list
+	with_empty_parameter_port_list   foo.sv  /^module with_empty_parameter_port_list #()$/;"  m
+	L5      foo.sv  /^    parameter  L5 = "synonym for the localparam";$/;" c       module:with_empty_parameter_port_list
+	L6      foo.sv  /^    localparam L6 = "localparam";$/;" c       module:with_empty_parameter_port_list
+	no_parameter_port_list   foo.sv  /^module no_parameter_port_list$/;"      m
+	P3      foo.sv  /^    parameter  P3 = "parameter";$/;"  c       module:no_parameter_port_list    parameter:
+	L7      foo.sv  /^    localparam L7 = "localparam";$/;" c       module:no_parameter_port_list
+
+Known Issues
+---------------------------------------------------------------------
+
+See https://github.com/universal-ctags/ctags/issues/TBD.
+
+
+SEE ALSO
+--------
+ctags(1), ctags-client-tools(7)