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SystemVerilog: mark sequence as K_PROPERTY
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hirooih committed Sep 5, 2020
1 parent 2aefcc4 commit d62bab0
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1 change: 1 addition & 0 deletions parsers/verilog.c
Original file line number Diff line number Diff line change
Expand Up @@ -198,6 +198,7 @@ static const keywordAssoc KeywordTable [] = {
{ "rand", K_IGNORE, { 1, 0 } },
{ "randc", K_IGNORE, { 1, 0 } },
{ "ref", K_PORT, { 1, 0 } },
{ "sequence", K_PROPERTY, { 1, 0 } },
{ "shortint", K_REGISTER, { 1, 0 } },
{ "shortreal", K_REGISTER, { 1, 0 } },
{ "static", K_IGNORE, { 1, 0 } },
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