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Update submodules.
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@wsnyder
wsnyder committed Apr 30, 2024
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Showing 3 changed files with 3 additions and 3 deletions.
2 changes: 1 addition & 1 deletion submodules/Cores-VeeR-EL2
Submodule Cores-VeeR-EL2 updated 1 files
+2 −2 .github/workflows/build-verilator.yml
2 changes: 1 addition & 1 deletion submodules/gtkwave
Submodule gtkwave updated 3 files
+3 −4 src/ptranslate.c
+5 −0 src/signal_list.c
+3 −4 src/ttranslate.c
2 changes: 1 addition & 1 deletion submodules/verilator
Submodule verilator updated 86 files
+27 −0 CITATION.cff
+1 −1 CMakeLists.txt
+24 −1 Changes
+10 −8 README.rst
+1 −0 bin/verilator
+1 −1 configure.ac
+4 −0 docs/CONTRIBUTORS
+6 −0 docs/guide/connecting.rst
+7 −0 docs/guide/exe_verilator.rst
+2 −0 docs/spelling.txt
+4 −2 include/verilated.cpp
+0 −1 include/verilated.mk.in
+2 −1 include/verilated_funcs.h
+9 −2 include/verilated_timing.cpp
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+2 −2 include/verilated_types.h
+7 −0 include/verilated_vpi.cpp
+5 −0 include/verilated_vpi.h
+1 −0 src/CMakeLists.txt
+1 −7 src/V3DfgPasses.cpp
+22 −6 src/V3DfgRegularize.cpp
+2 −1 src/V3LinkJump.cpp
+16 −14 src/V3LinkLValue.cpp
+1 −0 src/V3Options.cpp
+2 −0 src/V3Options.h
+28 −16 src/V3Task.cpp
+2 −1 src/V3Task.h
+9 −4 src/V3ThreadPool.h
+2 −2 src/V3Timing.cpp
+33 −12 src/V3Tristate.cpp
+24 −3 src/V3Width.cpp
+1 −1 src/VlcTest.h
+11 −6 src/verilog.y
+21 −0 test_regress/driver.pl
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+22 −0 test_regress/t/t_class_param_comma_bad.v
+22 −0 test_regress/t/t_delay_compare.pl
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+18 −0 test_regress/t/t_dfg_regularize_driver_of_sc_var.pl
+14 −0 test_regress/t/t_dfg_regularize_driver_of_sc_var.v
+1 −0 test_regress/t/t_dist_copyright.pl
+1 −2 test_regress/t/t_dist_warn_coverage.pl
+3 −0 test_regress/t/t_dynarray_init.v
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+19 −0 test_regress/t/t_event_method_bad.pl
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+19 −0 test_regress/t/t_inst_param_comma_bad.out
+19 −0 test_regress/t/t_inst_param_comma_bad.pl
+65 −0 test_regress/t/t_inst_param_comma_bad.v
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+2 −0 test_regress/t/t_queue.v
+21 −0 test_regress/t/t_queue_empty_pin.pl
+18 −0 test_regress/t/t_queue_empty_pin.v
+22 −0 test_regress/t/t_stream_unpack_lhs.out
+22 −0 test_regress/t/t_stream_unpack_lhs.pl
+137 −0 test_regress/t/t_stream_unpack_lhs.v
+4 −0 test_regress/t/t_sys_system.v
+23 −34 test_regress/t/t_time.v
+22 −0 test_regress/t/t_timing_zerodly_consecutive.pl
+14 −0 test_regress/t/t_timing_zerodly_consecutive.v
+1 −0 test_regress/t/t_trace_ub_misaligned_address.pl
+28 −0 test_regress/t/t_tri_gate_bufif0_pins_inout.pl
+29 −0 test_regress/t/t_tri_gate_bufif1_pins_inout.pl
+28 −0 test_regress/t/t_tri_gate_cond_pins_inout.pl
+28 −0 test_regress/t/t_tri_gate_nmos_pins_inout.pl
+28 −0 test_regress/t/t_tri_gate_notif0_pins_inout.pl
+28 −0 test_regress/t/t_tri_gate_notif1_pins_inout.pl
+28 −0 test_regress/t/t_tri_gate_pmos_pins_inout.pl
+26 −0 test_regress/t/t_tri_inout_pins_inout.pl
+24 −0 test_regress/t/t_tri_no_top.pl
+66 −0 test_regress/t/t_tri_no_top.v
+26 −0 test_regress/t/t_tri_pullup_pins_inout.pl
+26 −0 test_regress/t/t_tri_select_pins_inout.pl
+24 −0 test_regress/t/t_tri_struct_pins_inout.pl
+168 −0 test_regress/t/t_tri_top_en_out.cpp
+23 −0 test_regress/t/t_tri_top_en_out.pl
+221 −0 test_regress/t/t_tri_top_en_out.v
+23 −0 test_regress/t/t_tri_top_en_out_bad.pl
+11 −0 test_regress/t/t_tri_top_en_out_bad.v
+21 −0 test_regress/t/t_vpi_var.cpp
+2 −1 verilator-config.cmake.in

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