Bank switching

Te SH2 processors in the 32X have no ability to write to the cart... at all. This means that if any part of the cart needs writing (the mapper, save ram), the 68K side has to do it. If that were the only issue, it wouldn't be that bad. The problem is that for the 68K to write the cart area, the SH2 processors have to be kept from trying to access the cart at the same time. Normally, the SH2s get priority over the 68K, but that is done by having the 68K access the cart through an area in the map that allows the 32X IO chip to delay the 68K via a new DTACK signal. Hence why the 68K accesses the 32X via 0x880000 to 0x9FFFFF and 0xA15xxx. Those areas don't assert DTACK in the MD under normal conditions, so the 32X can use DTACK to hold off the 68K when it does access them. However, writes (and some reads, like save ram) don't allow the 32X to hold off the 68K via DTACK and hence need the 32X to be halted during said accesses. This is done with a control bit in the 32X IO chip (RV) that when set, will halt either SH2 if they try to access the cart. So the 68K must disable ints, set the RV bit, read/write the mapper or save ram, clear the RV bit, and enable ints.

Now if THAT were the only issue, it wouldn't be that bad: the 68K would disable ints, set RV, do its thing, and clear RV. The problem is that the SH2 can hang/crash when it accesses the cart when RV is set under some circumstances. The work around is to make sure that SH2s are running from SDRAM or the internal CACHE scratchpad RAM while RV is set. So this is what we do to change the mapper in the 32X:

• 68K disables ints
• 68K asserts COMMAND INT to both SH2 processors
• SH2s signal the 68K that they are responding to the CMD INT and are awaiting a command (the CMD INT handler is in SDRAM, so we know the SH2s are running in SDRAM with the irqs disabled as they are in the CMD IRQ handler)
• 68K sets RV bit, read/writes mapper, then clears RV
• 68K then sends a command to the SH2s saying "Sorry, my bad. Just exit and continue what you were doing."
• 68K enables ints

Note that BOTH SH2s must be looping in SDRAM during the read/write to cart hardware (unless one is doing nothing and just looping in SDRAM to begin with... like if you weren't using the Secondary SH2). This process works on every cart that supports the mapper that we've tested so far. Note that some older flash carts (NeoMyth, ED, MED (old versions)) aren't entirely stable when RV is set in 32X games, and will crash no matter what if the code takes too much time with RV set.