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Merge esp32 v7.2.0 #142

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Nov 26, 2023
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f5ee741
hw/mem/cxl-type3: Add CXL CDAT Data Object Exchange
hh81478072 Oct 14, 2022
882877f
hw/pci-bridge/cxl-upstream: Add a CDAT table access DOE
jic23 Oct 14, 2022
e72cfab
hw/virtio/virtio-iommu-pci: Enforce the device is plugged on the root…
eauger Oct 12, 2022
3b43302
virtio: introduce __virtio_queue_reset()
fengidri Oct 17, 2022
b3a8d6f
virtio: introduce virtio_queue_reset()
fengidri Oct 17, 2022
3c37f8b
virtio: introduce virtio_queue_enable()
Oct 17, 2022
69e1c14
virtio: core: vq reset feature negotation support
Oct 17, 2022
805d782
virtio-pci: support queue reset
fengidri Oct 17, 2022
d1060e3
virtio-pci: support queue enable
Oct 17, 2022
ff48b62
vhost: expose vhost_virtqueue_start()
Oct 17, 2022
e1f101d
vhost: expose vhost_virtqueue_stop()
Oct 17, 2022
c2daa08
vhost-net: vhost-kernel: introduce vhost_net_virtqueue_reset()
Oct 17, 2022
10f8a11
vhost-net: vhost-kernel: introduce vhost_net_virtqueue_restart()
Oct 17, 2022
4fdf69a
virtio-net: introduce flush_or_purge_queued_packets()
Oct 17, 2022
7dc6be5
virtio-net: support queue reset
fengidri Oct 17, 2022
7f86330
virtio-net: support queue_enable
Oct 17, 2022
2a3552b
vhost: vhost-kernel: enable vq reset feature
Oct 17, 2022
93a97dc
virtio-net: enable vq reset feature
fengidri Oct 17, 2022
9ea02e8
virtio-rng-pci: Allow setting nvectors, so we can use MSI-X
ddaney-fungible Oct 14, 2022
bd437c9
vhost-user: Fix out of order vring host notification handling
yajwu Oct 18, 2022
cfead31
acpi: pc: vga: use AcpiDevAmlIf interface to build VGA device descrip…
Oct 17, 2022
ab886c7
tests: acpi: whitelist DSDT before generating PCI-ISA bridge AML auto…
Oct 17, 2022
47a373f
acpi: pc/q35: drop ad-hoc PCI-ISA bridge AML routines and let bus enn…
Oct 17, 2022
fd4f2ae
tests: acpi: update expected DSDT after ISA bridge is moved directly …
Oct 17, 2022
ffb7459
tests: acpi: whitelist DSDT before generating ICH9_SMB AML automatically
Oct 17, 2022
5dbad0a
acpi: add get_dev_aml_func() helper
Oct 17, 2022
6d21461
acpi: enumerate SMB bridge automatically along with other PCI devices
Oct 17, 2022
5aaa1e1
tests: acpi: update expected blobs
Oct 17, 2022
11787b2
tests: acpi: pc/q35 whitelist DSDT before \_GPE cleanup
Oct 17, 2022
d12dbd4
acpi: pc/35: sanitize _GPE declaration order
Oct 17, 2022
0193d69
tests: acpi: update expected blobs
Oct 17, 2022
defb709
hw/acpi/erst.c: Fix memory handling issues
Oct 24, 2022
3b31125
MAINTAINERS: Add qapi/virtio.json to section "virtio"
Oct 20, 2022
15377f6
msix: Assert that specified vector is in range
akihikodaki Aug 29, 2022
2486dd0
hw/i386/pc.c: CXL Fixed Memory Window should not reserve e820 in bios
Oct 26, 2022
6f56d6d
hw/i386/acpi-build: Remove unused struct
shentok Oct 28, 2022
bbaa5c4
hw/i386/acpi-build: Resolve redundant attribute
shentok Oct 28, 2022
b496a17
hw/i386/acpi-build: Resolve north rather than south bridges
shentok Oct 28, 2022
83bcae9
hmat acpi: Don't require initiator value in -numa
bgoglin Oct 27, 2022
e7cb1ce
tests: acpi: add and whitelist *.hmat-noinitiator expected blobs
bgoglin Oct 27, 2022
a046f1d
tests: acpi: q35: add test for hmat nodes without initiators
bgoglin Oct 27, 2022
84c35b5
tests: acpi: q35: update expected blobs *.hmat-noinitiators expected …
bgoglin Oct 27, 2022
cfb4c05
tests: Add HMAT AArch64/virt empty table files
hesham-huawei Oct 27, 2022
7cbd3fd
hw/arm/virt: Enable HMAT on arm virt machine
Oct 27, 2022
b077b07
tests: acpi: aarch64/virt: add a test for hmat nodes with no initiators
hesham-huawei Oct 27, 2022
be3afe8
tests: virt: Update expected *.acpihmatvirt tables
hesham-huawei Oct 27, 2022
baa44bc
vfio: move implement of vfio_get_xlat_addr() to memory.c
lulu-github-name Oct 31, 2022
fb1d084
intel-iommu: don't warn guest errors when getting rid2pasid entry
jasowang Oct 28, 2022
da8d439
intel-iommu: drop VTDBus
jasowang Oct 28, 2022
940e552
intel-iommu: convert VTD_PE_GET_FPD_ERR() to be a function
jasowang Oct 28, 2022
1b2b123
intel-iommu: PASID support
jasowang Oct 28, 2022
8b67fe0
vhost: Change the sequence of device start
yajwu Oct 17, 2022
923b892
vhost-user: Support vhost_dev_start
yajwu Oct 17, 2022
05e27d7
hw/smbios: add core_count2 to smbios table type 4
jusual Oct 11, 2022
33bff4a
bios-tables-test: teach test to use smbios 3.0 tables
jusual Oct 11, 2022
159a0da
tests/acpi: allow changes for core_count2 test
jusual Oct 11, 2022
2d80b33
bios-tables-test: add test for number of cores > 255
jusual Oct 11, 2022
b22fbc5
tests/acpi: update tables for new core count test
jusual Oct 11, 2022
259d69c
hw/virtio: introduce virtio_device_should_start
stsquad Nov 7, 2022
1ef47f4
checkpatch: better pattern for inline comments
mstsirkin Nov 7, 2022
622a84e
Merge tag 'pull-loongarch-20221107' of https://gitlab.com/gaosong/qem…
stefanhaRH Nov 7, 2022
479b350
util/log: Make the per-thread flag immutable
gkurz Nov 4, 2022
524fc73
util/log: Ignore per-thread flag if global file already there
gkurz Nov 4, 2022
f21f1cf
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/m…
stefanhaRH Nov 7, 2022
8063db0
target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F
FlyGoat Oct 31, 2022
0e8b301
target/mips: Cast offset field of Octeon BBIT to int16_t
FlyGoat Oct 31, 2022
4525ea7
target/mips: Enable LBX/LWX/* instructions for Octeon
Dovgalyuk Nov 1, 2022
4bfc895
target/mips: Disable DSP ASE for Octeon68XX
FlyGoat Oct 31, 2022
2a2105a
target/mips: Don't check COP1X for 64 bit FP mode
FlyGoat Nov 2, 2022
04849c9
disas/nanomips: Fix invalid PRId64 format calling img_format()
philmd Nov 1, 2022
50fc094
disas/nanomips: Fix invalid PRIx64 format calling img_format()
philmd Nov 1, 2022
d03a008
disas/nanomips: Use G_GNUC_PRINTF to avoid invalid string formats
philmd Nov 1, 2022
e9ebb66
disas/nanomips: Remove headers already included by "qemu/osdep.h"
philmd Nov 1, 2022
24449fc
disas/nanomips: Move setjmp into nanomips_dis
rth7680 Nov 6, 2022
ad12061
disas/nanomips: Merge insn{1,2,3} into words[3]
rth7680 Nov 6, 2022
1414e3f
disas/nanomips: Split out read_u16
rth7680 Nov 6, 2022
bb3daca
disas/nanomips: Tidy read for 48-bit opcodes
rth7680 Nov 6, 2022
30dd5ff
MAINTAINERS: Inherit from nanoMIPS
philmd Oct 30, 2022
5770289
Revert "s390x/s390-virtio-ccw: add zpcii-disable machine property"
legoater Nov 7, 2022
d3d1a40
s390x/s390-virtio-ccw: Switch off zPCI enhancements on older machines
legoater Nov 7, 2022
ef99aa2
ui: fix tab indentation
amarjargal Oct 25, 2022
a076a3d
hw/display: fix tab indentation
amarjargal Oct 25, 2022
6c10e08
hw/usb: fix tab indentation
amarjargal Oct 25, 2022
3ba5fe4
Merge tag 'mips-20221108' of https://github.com/philmd/qemu into staging
stefanhaRH Nov 8, 2022
ade760a
Merge tag 'pull-request-2022-11-08' of https://gitlab.com/thuth/qemu …
stefanhaRH Nov 8, 2022
bc5add1
vhost-vdpa: fix assert !virtio_net_get_subqueue(nc)->async_tx.elem in…
siwliu-kernel Nov 8, 2022
f9c307c
memory: Fix wrong end address dump
duanzhenzhong Jun 22, 2022
ef7716c
Revert "hw/block/pflash_cfi: Error out if dev length isn't power of 2"
danielhb Nov 8, 2022
60ab369
Update VERSION for v7.2.0-rc0
stefanhaRH Nov 8, 2022
35abb00
tcg: Move TCG_TARGET_HAS_direct_jump init to tb_gen_code
rth7680 Nov 5, 2022
344b63b
accel/tcg: Split out setjmp_gen_code
rth7680 Nov 6, 2022
2ccad61
Merge tag 'pull-tcg-20221109' of https://gitlab.com/rth7680/qemu into…
stefanhaRH Nov 9, 2022
d69a879
block/mirror: Do not wait for active writes
XanClic Nov 9, 2022
eb99491
block/mirror: Drop mirror_wait_for_any_operation()
XanClic Nov 9, 2022
da93d5c
block/mirror: Fix NULL s->job in active writes
XanClic Nov 9, 2022
3859129
iotests/151: Test that active mirror progresses
XanClic Nov 9, 2022
7b5929c
iotests/151: Test active requests on mirror start
XanClic Nov 9, 2022
c785326
qapi/block-core: Fix BlockdevOptionsNvmeIoUring @path description
albertofaria Nov 8, 2022
e56b0c6
block/blkio: Set BlockDriver::has_variable_length to false
albertofaria Nov 8, 2022
d5f8d79
block: Make bdrv_child_get_parent_aio_context I/O
XanClic Nov 7, 2022
af5b6eb
block-backend: Update ctx immediately after root
XanClic Nov 7, 2022
ace5a16
block: Start/end drain on correct AioContext
XanClic Nov 7, 2022
53a3b83
checkpatch: typo fix
mstsirkin Nov 8, 2022
28cf396
display: include dependencies explicitly
mstsirkin Nov 9, 2022
f47af0a
virtio-net: fix for heap-buffer-overflow
fengidri Nov 10, 2022
ec56513
hw/pci-host/pnv_phb: Avoid quitting QEMU if hotplug of pnv-phb-root-p…
huth Nov 9, 2022
7d7238c
rtl8139: Remove unused variable
LaneWolf Nov 9, 2022
6083dca
tulip: Remove unused variable
LaneWolf Nov 9, 2022
0f48c47
qemu-img: remove unused variable
LaneWolf Nov 9, 2022
5ab8ba9
host-libusb: Remove unused variable
LaneWolf Nov 9, 2022
b2a3cbb
libdecnumber/dpd/decimal64: Fix compiler warning from Clang 15
huth Nov 10, 2022
e009113
qga: Allow building of the guest agent without system emulators or tools
huth Nov 10, 2022
f469150
net: Replace TAB indentations with spaces
ahmedaabouzied Jun 14, 2021
2cb40d4
Fix several typos in documentation (found by codespell)
stweil Nov 10, 2022
67c6597
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/m…
stefanhaRH Nov 11, 2022
b587170
Merge tag 'pull-ppc-20221111' of https://gitlab.com/danielhb/qemu int…
stefanhaRH Nov 11, 2022
6a4cff8
Merge tag 'pull-request-2022-11-11' of https://gitlab.com/thuth/qemu …
stefanhaRH Nov 11, 2022
46b21de
hw/loongarch: Fix loongarch fdt addr confict
gaosong-loongson Nov 9, 2022
57bc6e4
libvduse: Avoid warning about dangerous use of strncpy()
philmd Nov 11, 2022
305f6f6
Merge tag 'pull-la-20221112' of https://gitlab.com/rth7680/qemu into …
stefanhaRH Nov 12, 2022
46530d3
tests/stream-under-throttle: New test
XanClic Nov 10, 2022
32bd99d
MAINTAINERS: Update maintainer's email for Xilinx CAN
Nov 14, 2022
d9721f1
hw/intc/arm_gicv3: fix prio masking on pmr write
jenswi-linaro Nov 14, 2022
98f10f0
Merge tag 'pull-target-arm-20221114' of https://git.linaro.org/people…
stefanhaRH Nov 14, 2022
bb00d0a
Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging
stefanhaRH Nov 14, 2022
d1bb978
target/i386: fix cmpxchg with 32-bit register destination
bonzini Sep 11, 2022
35d95e4
target/i386: hardcode R_EAX as destination register for LAHF/SAHF
bonzini Sep 15, 2022
dd64bce
Merge tag 'pull-x86-20221115' of https://gitlab.com/rth7680/qemu into…
stefanhaRH Nov 15, 2022
2c83112
Update VERSION for v7.2.0-rc1
stefanhaRH Nov 15, 2022
44ee69e
s390x: Fix spelling errors
huth Nov 11, 2022
be5df2e
docs/system/s390x: Document the "loadparm" machine property
huth Nov 14, 2022
c70fe3b
ci: replace x86_64 macos-11 with aarch64 macos-12
berrange Nov 16, 2022
1b7a07c
acpi/tests/avocado/bits: some misc fixes
ani-sinha Nov 17, 2022
049b4ad
target/ppc: Fix build warnings when building with 'disable-tcg'
vaibhav92 Nov 16, 2022
2be954a
Merge tag 'pull-request-2022-11-17' of https://gitlab.com/thuth/qemu …
stefanhaRH Nov 17, 2022
a082fab
Merge tag 'pull-ppc-20221117' of https://gitlab.com/danielhb/qemu int…
stefanhaRH Nov 17, 2022
06639f8
chardev/char-win-stdio: Pass Ctrl+C to guest with a multiplexed monitor
lbmeng Oct 25, 2022
a216ec8
migration/channel-block: fix return value for qio_channel_block_{read…
foxmox Oct 13, 2022
4cc47b4
migration/multifd/zero-copy: Create helper function for flushing
Oct 25, 2022
4934a5d
migration: Fix possible infinite loop of ram save process
xzpeter Oct 4, 2022
f5816b5
migration: Fix race on qemu_file_shutdown()
xzpeter Oct 4, 2022
afed427
migration: Disallow postcopy preempt to be used with compress
xzpeter Oct 4, 2022
cedb70e
migration: Use non-atomic ops for clear log bitmap
xzpeter Oct 4, 2022
6f39c90
migration: Disable multifd explicitly with compression
xzpeter Oct 4, 2022
b528043
migration: Block migration comment or code is wrong
Oct 3, 2022
93e2da3
hw/sd: Fix sun4i allwinner-sdhost for U-Boot
straxy Nov 21, 2022
69e7e60
hw/intc: clean-up access to GIC multi-byte registers
stsquad Nov 21, 2022
3d5af53
hw/intc: add implementation of GICD_IIDR to Arm GIC
stsquad Nov 21, 2022
c446252
tests/avocado/boot_linux.py: Bump aarch64 virt test timeout to 720s
pm215 Nov 21, 2022
312b71a
target/arm: Limit LPA2 effective output address when TCR.DS == 0
ardbiesheuvel Nov 21, 2022
050143b
Merge tag 'chr-pull-request' of https://gitlab.com/marcandre.lureau/q…
stefanhaRH Nov 21, 2022
af29446
Merge tag 'next-pull-request' of https://gitlab.com/juan.quintela/qem…
stefanhaRH Nov 21, 2022
0b710ae
Merge tag 'pull-target-arm-20221121' of https://git.linaro.org/people…
stefanhaRH Nov 21, 2022
bd142b2
rtl8139: avoid clobbering tx descriptor bits
stefanhaRH Nov 17, 2022
c74831a
rtl8139: keep Tx command mode 0 and 1 separate
stefanhaRH Nov 17, 2022
6d71357
rtl8139: honor large send MSS value
stefanhaRH Nov 17, 2022
47fdc8f
Run docker probe only if docker or podman are available
stweil Nov 17, 2022
a4b14b4
tests/avocado/machine_aspeed.py: Reduce noise on the console for SDK …
legoater Nov 17, 2022
e558220
tests/docker: allow user to override check target
stsquad Nov 17, 2022
668725c
docs/devel: add a maintainers section to development process
stsquad Nov 17, 2022
115847f
docs/devel: make language a little less code centric
stsquad Nov 17, 2022
ca127fe
docs/devel: simplify the minimal checklist
stsquad Nov 17, 2022
73ee4c5
docs/devel: try and improve the language around patch review
stsquad Nov 17, 2022
5d25e1e
tests/avocado: Raise timeout for boot_linux.py:BootLinuxPPC64.test_ps…
pm215 Nov 17, 2022
ba5d1f2
tests/avocado: introduce alpine virt test for CI
stsquad Nov 17, 2022
f22a807
tests/avocado: skip aarch64 cloud TCG tests in CI
stsquad Nov 17, 2022
5544d33
gitlab: integrate coverage report
stsquad Nov 17, 2022
562a7d2
vhost: mask VIRTIO_F_RING_RESET for vhost and vhost-user devices
stefano-garzarella Nov 21, 2022
2df3086
tests: acpi: whitelist DSDT before moving PRQx to _SB scope
Nov 21, 2022
4fd75ce
acpi: x86: move RPQx field back to _SB scope
Nov 21, 2022
83afb14
tests: acpi: x86: update expected DSDT after moving PRQx fields in _S…
Nov 21, 2022
242a58c
MAINTAINERS: add mst to list of biosbits maintainers
ani-sinha Nov 11, 2022
c4d4c40
tests/avocado: configure acpi-bits to use avocado timeout
jnsnow Nov 15, 2022
04e5bd4
acpi/tests/avocado/bits: keep the work directory when BITS_DEBUG is s…
ani-sinha Nov 17, 2022
b7c6178
virtio: disable error for out of spec queue-enable
mstsirkin Nov 21, 2022
0208ba7
hw/loongarch: Add default stdout uart in fdt
yangxiaojuan-loongson Nov 10, 2022
e8c8203
hw/loongarch: Fix setprop_sized method in fdt rtc node.
yangxiaojuan-loongson Nov 16, 2022
4451cc4
hw/loongarch: Replace the value of uart info with macro
yangxiaojuan-loongson Nov 10, 2022
26ba00c
target/arm: Don't do two-stage lookup if stage 2 is disabled
pm215 Nov 21, 2022
d3e9c79
Merge tag 'pull-misc-for-7.2-221122-1' of https://gitlab.com/stsquad/…
stefanhaRH Nov 22, 2022
ccb8d59
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/m…
stefanhaRH Nov 22, 2022
16a550b
Merge tag 'pull-loongarch-20221122' of https://gitlab.com/gaosong/qem…
stefanhaRH Nov 22, 2022
15f8f46
target/arm: Use signed quantity to represent VMSAv8-64 translation level
ardbiesheuvel Nov 22, 2022
80e99f2
Merge tag 'pull-target-arm-20221122' of https://git.linaro.org/people…
stefanhaRH Nov 22, 2022
7c09a7f
Update VERSION for v7.2.0-rc2
stefanhaRH Nov 22, 2022
72cf57b
tests/avocado: Update the URLs of the advent calendar images
huth Nov 21, 2022
9f083d6
tests/qtest: Decrease the amount of output from the qom-test
huth Nov 21, 2022
4189af7
tests/avocado: use new rootfs for orangepi test
stsquad Nov 18, 2022
fb977a8
Revert "usbredir: avoid queuing hello packet on snapshot restore"
Nov 23, 2022
29e0bff
gtk: disable GTK Clipboard with a new meson option
Nov 21, 2022
d68640f
hw/usb/hcd-xhci.c: spelling: tranfer
Nov 5, 2022
64f1359
ui/gtk: prevent ui lock up when dpy_gl_update called again before cur…
downor Oct 21, 2022
1dfb7a1
hw/usb/hcd-xhci: Reset the XHCIState with device_cold_reset()
pm215 Oct 14, 2022
3e95ef4
hw/audio/intel-hda: don't reset codecs twice
pm215 Oct 14, 2022
7d3cf19
hw/audio/intel-hda: Drop unnecessary prototype
pm215 Oct 14, 2022
e72db29
Merge tag 'pull-request-2022-11-23' of https://gitlab.com/thuth/qemu …
stefanhaRH Nov 23, 2022
a33c253
Merge tag 'fixes-20221123-pull-request' of https://gitlab.com/kraxel/…
stefanhaRH Nov 23, 2022
c23a956
virtiofsd: Add `sigreturn` to the seccomp whitelist
mhartmay Nov 25, 2022
266aaed
libvhost-user: Fix wrong type of argument to formatting function (rep…
Nov 26, 2022
8541bf4
libvhost-user: Fix format strings
Nov 26, 2022
7d4774e
libvhost-user: Fix two more format strings
Nov 26, 2022
52a57d8
libvhost-user: Add format attribute to local function vu_panic
Nov 26, 2022
ec09f22
MAINTAINERS: Add subprojects/libvhost-user to section "vhost"
Nov 26, 2022
ac14949
Add G_GNUC_PRINTF to function qemu_set_info_str and fix related issues
Nov 26, 2022
ab1b2ba
update seabios source from 1.16.0 to 1.16.1
kraxel Nov 28, 2022
a704cb5
update seabios binaries to 1.16.1
kraxel Nov 28, 2022
fb72e77
replay: Fix declaration of replay_read_next_clock
rth7680 Nov 29, 2022
ecbb6bd
Merge tag 'seabios-1.16.1-20221128-pull-request' of https://gitlab.co…
stefanhaRH Nov 29, 2022
61c34fc
hw/display/qxl: Have qxl_log_command Return early if no log_cmd handler
philmd Nov 28, 2022
b1901de
hw/display/qxl: Document qxl_phys2virt()
philmd Nov 28, 2022
8efec0e
hw/display/qxl: Pass requested buffer size to qxl_phys2virt()
philmd Nov 28, 2022
6dbbf05
hw/display/qxl: Avoid buffer overrun in qxl_phys2virt (CVE-2022-4144)
philmd Nov 28, 2022
86fdb05
hw/display/qxl: Assert memory slot fits in preallocated MemoryRegion
philmd Nov 28, 2022
7103895
block-backend: avoid bdrv_unregister_buf() NULL pointer deref
stefanhaRH Nov 21, 2022
475e56b
target/arm: Set TCGCPUOps.restore_state_to_opc for v7m
unspecd Nov 29, 2022
c4ffd91
Update VERSION for v7.2.0-rc3
stefanhaRH Nov 29, 2022
523e400
tests/qtests: override "force-legacy" for gpio virtio-mmio tests
stsquad Nov 30, 2022
4daa505
vhost: enable vrings in vhost_dev_start() for vhost-user devices
stefano-garzarella Nov 30, 2022
060f4a9
hw/virtio: add started_vu status field to vhost-user-gpio
stsquad Nov 30, 2022
71e076a
hw/virtio: generalise CHR_EVENT_CLOSED handling
stsquad Nov 30, 2022
4987e5b
include/hw: VM state takes precedence in virtio_device_should_start
stsquad Nov 30, 2022
433c71e
hw/nvme: fix aio cancel in format
birkelund Nov 10, 2022
3dbc170
hw/nvme: fix aio cancel in flush
birkelund Nov 10, 2022
36a251c
hw/nvme: fix aio cancel in zone reset
birkelund Nov 10, 2022
818b9b8
hw/nvme: fix aio cancel in dsm
birkelund Nov 10, 2022
83f56ac
hw/nvme: remove copy bh scheduling
birkelund Jul 14, 2022
38e6593
target/i386: allow MMX instructions with CR4.OSFXSR=0
bonzini Nov 30, 2022
8218c04
target/i386: Always completely initialize TranslateFault
rth7680 Dec 1, 2022
14dccc8
hw/loongarch/virt: Add cfi01 pflash device
yangxiaojuan-loongson Nov 7, 2022
0f0a9e4
tests/qtest/migration-test: Fix unlink error and memory leaks
huth Nov 25, 2022
21be74a
target/s390x/tcg: Fix and improve the SACF instruction
huth Dec 1, 2022
c1966f5
hw/display/next-fb: Fix comment typo
unspecd Nov 25, 2022
42f3253
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/m…
stefanhaRH Dec 4, 2022
4bd638a
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
stefanhaRH Dec 4, 2022
bb94fa8
Merge tag 'nvme-next-pull-request' of git://git.infradead.org/qemu-nv…
stefanhaRH Dec 4, 2022
777fa06
Merge tag 'pull-loongarch-20221202' of https://gitlab.com/gaosong/qem…
stefanhaRH Dec 4, 2022
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Merge tag 'pull-request-2022-12-04' of https://gitlab.com/thuth/qemu …
stefanhaRH Dec 4, 2022
edc93f4
Revert "hw/loongarch/virt: Add cfi01 pflash device"
gaosong-loongson Dec 5, 2022
ea3a008
Update VERSION for v7.2.0-rc4
stefanhaRH Dec 7, 2022
b67b00e
Update VERSION for v7.2.0
stefanhaRH Dec 13, 2022
6d3f109
Merge branch 'MINI404' into merge-main-to-v7
vintagepc Oct 1, 2023
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Merge branch 'MINI404' into merge-v7.2.0
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Merge tag 'v7.2.0' into merge-v7.2.0
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Update code for merge changes
vintagepc Nov 20, 2023
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fix builds
vintagepc Nov 20, 2023
e9137b4
take 2
vintagepc Nov 20, 2023
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GCC12 fix
vintagepc Nov 20, 2023
1d9fd97
Implement interrupt in RNG (fixes hanging test in 7.2.0)
vintagepc Nov 20, 2023
925b370
Merge ESP32 QEMU from expressif
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Merge branch 'MINI404' into merge-esp32-v7.2.0
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1 change: 1 addition & 0 deletions configs/devices/xtensa-softmmu/default.mak
Original file line number Diff line number Diff line change
Expand Up @@ -7,3 +7,4 @@ CONFIG_SEMIHOSTING=y
CONFIG_XTENSA_SIM=y
CONFIG_XTENSA_VIRT=y
CONFIG_XTENSA_XTFPGA=y
CONFIG_XTENSA_ESP32=y
4 changes: 4 additions & 0 deletions crypto/meson.build
Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,10 @@ crypto_ss.add(when: gnutls, if_true: files('tls-cipher-suites.c'))

util_ss.add(files('sm4.c'))
util_ss.add(files('aes.c'))
util_ss.add(files('sha512-internal.c'))
util_ss.add(files('sha384-internal.c'))
util_ss.add(files('sha256-internal.c'))
util_ss.add(files('sha1-internal.c'))
util_ss.add(files('init.c'))
if gnutls.found()
util_ss.add(gnutls)
Expand Down
227 changes: 227 additions & 0 deletions crypto/sha1-internal.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,227 @@
/*
* SHA1 hash implementation and interface functions
* Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
*
* This software may be distributed under the terms of the BSD license.
* See README for more details.
*/

#include "sha1_i.h"
#include "stddef.h"
#include "string.h"

typedef struct sha1_state SHA1_CTX;

/* ===== start - public domain SHA1 implementation ===== */

/*
* SHA-1 in C
* By Steve Reid <sreid@sea-to-sky.net>
* 100% Public Domain
*
* -----------------
* Modified 7/98
* By James H. Brown <jbrown@burgoyne.com>
* Still 100% Public Domain
*
* Corrected a problem which generated improper hash values on 16 bit machines
* Routine SHA1Update changed from
* void SHA1Update(SHA1_CTX* context, unsigned char* data, unsigned int
* len)
* to
* void SHA1Update(SHA1_CTX* context, unsigned char* data, unsigned
* long len)
*
* The 'len' parameter was declared an int which works fine on 32 bit machines.
* However, on 16 bit machines an int is too small for the shifts being done
* against
* it. This caused the hash function to generate incorrect values if len was
* greater than 8191 (8K - 1) due to the 'len << 3' on line 3 of SHA1Update().
*
* Since the file IO in main() reads 16K at a time, any file 8K or larger would
* be guaranteed to generate the wrong hash (e.g. Test Vector #3, a million
* "a"s).
*
* I also changed the declaration of variables i & j in SHA1Update to
* unsigned long from unsigned int for the same reason.
*
* These changes should make no difference to any 32 bit implementations since
* an
* int and a long are the same size in those environments.
*
* --
* I also corrected a few compiler warnings generated by Borland C.
* 1. Added #include <process.h> for exit() prototype
* 2. Removed unused variable 'j' in SHA1Final
* 3. Changed exit(0) to return(0) at end of main.
*
* ALL changes I made can be located by searching for comments containing 'JHB'
* -----------------
* Modified 8/98
* By Steve Reid <sreid@sea-to-sky.net>
* Still 100% public domain
*
* 1- Removed #include <process.h> and used return() instead of exit()
* 2- Fixed overwriting of finalcount in SHA1Final() (discovered by Chris Hall)
* 3- Changed email address from steve@edmweb.com to sreid@sea-to-sky.net
*
* -----------------
* Modified 4/01
* By Saul Kravitz <Saul.Kravitz@celera.com>
* Still 100% PD
* Modified to run on Compaq Alpha hardware.
*
* -----------------
* Modified 4/01
* By Jouni Malinen <j@w1.fi>
* Minor changes to match the coding style used in Dynamics.
*
* Modified September 24, 2004
* By Jouni Malinen <j@w1.fi>
* Fixed alignment issue in SHA1Transform when SHA1HANDSOFF is defined.
*
*/

/*
* Test Vectors (from FIPS PUB 180-1)
* "abc"
* A9993E36 4706816A BA3E2571 7850C26C 9CD0D89D
* "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"
* 84983E44 1C3BD26E BAAE4AA1 F95129E5 E54670F1
* A million repetitions of "a"
* 34AA973C D4C4DAA4 F61EEB2B DBAD2731 6534016F
*/

#define SHA1HANDSOFF

#define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits))))

/* blk0() and blk() perform the initial expand. */
/* I got the idea of expanding during the round function from SSLeay */
#ifndef WORDS_BIGENDIAN
#define blk0(i) (block->l[i] = (rol(block->l[i], 24) & 0xFF00FF00) | \
(rol(block->l[i], 8) & 0x00FF00FF))
#else
#define blk0(i) (block->l[i])
#endif
#define blk(i) (block->l[i & 15] = rol(block->l[(i + 13) & 15] ^ \
block->l[(i + 8) & 15] ^ block->l[(i + 2) & 15] ^ block->l[i & 15], 1))

/* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
#define R0(v, w, x, y, z, i) \
do { \
z += ((w & (x ^ y)) ^ y) + blk0(i) + 0x5A827999 + rol(v, 5); \
w = rol(w, 30); \
} while (0)
#define R1(v, w, x, y, z, i) \
do { \
z += ((w & (x ^ y)) ^ y) + blk(i) + 0x5A827999 + rol(v, 5); \
w = rol(w, 30); \
} while (0)
#define R2(v, w, x, y, z, i) \
do { \
z += (w ^ x ^ y) + blk(i) + 0x6ED9EBA1 + rol(v, 5); \
w = rol(w, 30); \
} while (0)
#define R3(v, w, x, y, z, i) \
do { \
z += (((w | x) & y) | (w & x)) + blk(i) + 0x8F1BBCDC + rol(v, 5); \
w = rol(w, 30); \
} while (0)
#define R4(v, w, x, y, z, i) \
do { \
z += (w ^ x ^ y) + blk(i) + 0xCA62C1D6 + rol(v, 5); \
w = rol(w, 30); \
} while (0)

/* Hash a single 512-bit block. This is the core of the algorithm. */

void sha1_compress(uint32_t state[5], const unsigned char buffer[64])
{
uint32_t a, b, c, d, e;
typedef union {
unsigned char c[64];
uint32_t l[16];
} CHAR64LONG16;
CHAR64LONG16 *block;
#ifdef SHA1HANDSOFF
CHAR64LONG16 workspace;
block = &workspace;
memcpy(block, buffer, 64);
#else
block = (CHAR64LONG16 *) buffer;
#endif
/* Copy context->state[] to working vars */
a = state[0];
b = state[1];
c = state[2];
d = state[3];
e = state[4];
/* 4 rounds of 20 operations each. Loop unrolled. */
R0(a, b, c, d, e, 0); R0(e, a, b, c, d, 1);
R0(d, e, a, b, c, 2); R0(c, d, e, a, b, 3);
R0(b, c, d, e, a, 4); R0(a, b, c, d, e, 5);
R0(e, a, b, c, d, 6); R0(d, e, a, b, c, 7);
R0(c, d, e, a, b, 8); R0(b, c, d, e, a, 9);
R0(a, b, c, d, e, 10); R0(e, a, b, c, d, 11);
R0(d, e, a, b, c, 12); R0(c, d, e, a, b, 13);
R0(b, c, d, e, a, 14); R0(a, b, c, d, e, 15);
R1(e, a, b, c, d, 16); R1(d, e, a, b, c, 17);
R1(c, d, e, a, b, 18); R1(b, c, d, e, a, 19);
R2(a, b, c, d, e, 20); R2(e, a, b, c, d, 21);
R2(d, e, a, b, c, 22); R2(c, d, e, a, b, 23);
R2(b, c, d, e, a, 24); R2(a, b, c, d, e, 25);
R2(e, a, b, c, d, 26); R2(d, e, a, b, c, 27);
R2(c, d, e, a, b, 28); R2(b, c, d, e, a, 29);
R2(a, b, c, d, e, 30); R2(e, a, b, c, d, 31);
R2(d, e, a, b, c, 32); R2(c, d, e, a, b, 33);
R2(b, c, d, e, a, 34); R2(a, b, c, d, e, 35);
R2(e, a, b, c, d, 36); R2(d, e, a, b, c, 37);
R2(c, d, e, a, b, 38); R2(b, c, d, e, a, 39);
R3(a, b, c, d, e, 40); R3(e, a, b, c, d, 41);
R3(d, e, a, b, c, 42); R3(c, d, e, a, b, 43);
R3(b, c, d, e, a, 44); R3(a, b, c, d, e, 45);
R3(e, a, b, c, d, 46); R3(d, e, a, b, c, 47);
R3(c, d, e, a, b, 48); R3(b, c, d, e, a, 49);
R3(a, b, c, d, e, 50); R3(e, a, b, c, d, 51);
R3(d, e, a, b, c, 52); R3(c, d, e, a, b, 53);
R3(b, c, d, e, a, 54); R3(a, b, c, d, e, 55);
R3(e, a, b, c, d, 56); R3(d, e, a, b, c, 57);
R3(c, d, e, a, b, 58); R3(b, c, d, e, a, 59);
R4(a, b, c, d, e, 60); R4(e, a, b, c, d, 61);
R4(d, e, a, b, c, 62); R4(c, d, e, a, b, 63);
R4(b, c, d, e, a, 64); R4(a, b, c, d, e, 65);
R4(e, a, b, c, d, 66); R4(d, e, a, b, c, 67);
R4(c, d, e, a, b, 68); R4(b, c, d, e, a, 69);
R4(a, b, c, d, e, 70); R4(e, a, b, c, d, 71);
R4(d, e, a, b, c, 72); R4(c, d, e, a, b, 73);
R4(b, c, d, e, a, 74); R4(a, b, c, d, e, 75);
R4(e, a, b, c, d, 76); R4(d, e, a, b, c, 77);
R4(c, d, e, a, b, 78); R4(b, c, d, e, a, 79);
/* Add the working vars back into context.state[] */
state[0] += a;
state[1] += b;
state[2] += c;
state[3] += d;
state[4] += e;
/* Wipe variables */
a = b = c = d = e = 0;
#ifdef SHA1HANDSOFF
memset(block, 0, 64);
#endif
}

/* sha1_init - Initialize new context */

void sha1_init(SHA1_CTX *context)
{
/* SHA1 initialization constants */
context->state[0] = 0x67452301;
context->state[1] = 0xEFCDAB89;
context->state[2] = 0x98BADCFE;
context->state[3] = 0x10325476;
context->state[4] = 0xC3D2E1F0;
context->count[0] = context->count[1] = 0;
}

/* ===== end - public domain SHA1 implementation ===== */
21 changes: 21 additions & 0 deletions crypto/sha1_i.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,21 @@
/*
* SHA1 internal definitions
* Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
*
* This software may be distributed under the terms of the BSD license.
* See README for more details.
*/

#ifndef SHA1_I_H
#define SHA1_I_H
#include "qemu/osdep.h"

struct sha1_state {
uint32_t state[5];
uint32_t count[2];
};

void sha1_init(struct sha1_state *context);
void sha1_compress(uint32_t state[5], const unsigned char buffer[64]);

#endif /* SHA1_I_H */
107 changes: 107 additions & 0 deletions crypto/sha256-internal.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,107 @@
/*
* SHA-256 hash implementation and interface functions
* Copyright (c) 2003-2011, Jouni Malinen <j@w1.fi>
*
* This software may be distributed under the terms of the BSD license.
* See README for more details.
*/

#include "sha256_i.h"

static inline uint32_t WPA_GET_BE32(const uint8_t *a)
{
return ((uint32_t) a[0] << 24) | (a[1] << 16) | (a[2] << 8) | a[3];
}

/* ===== start - public domain SHA256 implementation ===== */

/*
* This is based on SHA256 implementation in LibTomCrypt that was released into
* public domain by Tom St Denis.
*/

/* the K array */
static const unsigned long K[64] = {
0x428a2f98UL, 0x71374491UL, 0xb5c0fbcfUL, 0xe9b5dba5UL, 0x3956c25bUL,
0x59f111f1UL, 0x923f82a4UL, 0xab1c5ed5UL, 0xd807aa98UL, 0x12835b01UL,
0x243185beUL, 0x550c7dc3UL, 0x72be5d74UL, 0x80deb1feUL, 0x9bdc06a7UL,
0xc19bf174UL, 0xe49b69c1UL, 0xefbe4786UL, 0x0fc19dc6UL, 0x240ca1ccUL,
0x2de92c6fUL, 0x4a7484aaUL, 0x5cb0a9dcUL, 0x76f988daUL, 0x983e5152UL,
0xa831c66dUL, 0xb00327c8UL, 0xbf597fc7UL, 0xc6e00bf3UL, 0xd5a79147UL,
0x06ca6351UL, 0x14292967UL, 0x27b70a85UL, 0x2e1b2138UL, 0x4d2c6dfcUL,
0x53380d13UL, 0x650a7354UL, 0x766a0abbUL, 0x81c2c92eUL, 0x92722c85UL,
0xa2bfe8a1UL, 0xa81a664bUL, 0xc24b8b70UL, 0xc76c51a3UL, 0xd192e819UL,
0xd6990624UL, 0xf40e3585UL, 0x106aa070UL, 0x19a4c116UL, 0x1e376c08UL,
0x2748774cUL, 0x34b0bcb5UL, 0x391c0cb3UL, 0x4ed8aa4aUL, 0x5b9cca4fUL,
0x682e6ff3UL, 0x748f82eeUL, 0x78a5636fUL, 0x84c87814UL, 0x8cc70208UL,
0x90befffaUL, 0xa4506cebUL, 0xbef9a3f7UL, 0xc67178f2UL
};

/* Compress */
#define RND(a, b, c, d, e, f, g, h, i) \
t0 = h + Sigma1(e) + Ch(e, f, g) + K[i] + W[i]; \
t1 = Sigma0(a) + Maj(a, b, c); \
d += t0; \
h = t0 + t1;
/* Various logical functions */
#define RORc(x, y) \
(((((unsigned long) (x) & 0xFFFFFFFFUL) >> (unsigned long) ((y) & 31)) | \
((unsigned long) (x) << (unsigned long) (32 - ((y) & 31)))) & 0xFFFFFFFFUL)
#define Ch(x, y, z) (z ^ (x & (y ^ z)))
#define Maj(x, y, z) (((x | y) & z) | (x & y))
#define S(x, n) RORc((x), (n))
#define R(x, n) (((x) & 0xFFFFFFFFUL) >> (n))
#define Sigma0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22))
#define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25))
#define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3))
#define Gamma1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10))

/* compress 512-bits */
int sha256_compress(struct sha256_state *md, unsigned char *buf)
{
uint32_t S[8], W[64], t0, t1;
uint32_t t;
int i;

/* copy state into S */
for (i = 0; i < 8; i++) {
S[i] = md->state[i];
}

/* copy the state into 512-bits into W[0..15] */
for (i = 0; i < 16; i++) {
W[i] = WPA_GET_BE32(buf + (4 * i));
}
/* fill W[16..63] */
for (i = 16; i < 64; i++) {
W[i] = Gamma1(W[i - 2]) + W[i - 7] + Gamma0(W[i - 15]) +
W[i - 16];
}

for (i = 0; i < 64; ++i) {
RND(S[0], S[1], S[2], S[3], S[4], S[5], S[6], S[7], i);
t = S[7]; S[7] = S[6]; S[6] = S[5]; S[5] = S[4];
S[4] = S[3]; S[3] = S[2]; S[2] = S[1]; S[1] = S[0]; S[0] = t;
}

/* feedback */
for (i = 0; i < 8; i++) {
md->state[i] = md->state[i] + S[i];
}
return 0;
}

/* Initialize the hash state */
void sha256_init(struct sha256_state *md)
{
md->state[0] = 0x6A09E667UL;
md->state[1] = 0xBB67AE85UL;
md->state[2] = 0x3C6EF372UL;
md->state[3] = 0xA54FF53AUL;
md->state[4] = 0x510E527FUL;
md->state[5] = 0x9B05688CUL;
md->state[6] = 0x1F83D9ABUL;
md->state[7] = 0x5BE0CD19UL;
}

/* ===== end - public domain SHA256 implementation ===== */
20 changes: 20 additions & 0 deletions crypto/sha256_i.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
/*
* SHA-256 internal definitions
* Copyright (c) 2003-2011, Jouni Malinen <j@w1.fi>
*
* This software may be distributed under the terms of the BSD license.
* See README for more details.
*/

#ifndef SHA256_I_H
#define SHA256_I_H
#include "qemu/osdep.h"

struct sha256_state {
uint32_t state[8];
};

void sha256_init(struct sha256_state *md);
int sha256_compress(struct sha256_state *md, unsigned char *buf);

#endif /* SHA256_I_H */
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