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Defect Description :
In the home page/landing page of "Schematic Design Of Transistor Level XOR & XNOR Gate" experiment, an extra header link is present in the page where the extra header link should be removed as it is not required
Actual Result :
In the home page/landing page of "Schematic Design Of Transistor Level XOR & XNOR Gate" experiment, an extra header link is present in the page
Environment :
OS: Windows 7, Linux
Browsers: Firefox,Chrome
Bandwidth : 100Mbps
Hardware Configuration:8GBRAM ,
Processor:i5
Defect Description :
In the home page/landing page of "Schematic Design Of Transistor Level XOR & XNOR Gate" experiment, an extra header link is present in the page where the extra header link should be removed as it is not required
Actual Result :
In the home page/landing page of "Schematic Design Of Transistor Level XOR & XNOR Gate" experiment, an extra header link is present in the page
Environment :
OS: Windows 7, Linux
Browsers: Firefox,Chrome
Bandwidth : 100Mbps
Hardware Configuration:8GBRAM ,
Processor:i5
Test Step Link:
https://github.com/Virtual-Labs/lsi-iiith/blob/master/test-cases/integration_test-cases/Schematic%20Design%20Of%20Transistor%20Level%20XOR%20%26%20XNOR%20Gate/Schematic%20Design%20Of%20Transistor%20Level%20XOR%20%26%20XNOR%20Gate_01_Usability_smk.org
Attachment:
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