[Kernel] Add w8a8 CUTLASS kernels

[tlrmchlsmth]

This PR adds fp8_e4m3fn and int8 GEMM kernels, using NVIDIA CUTLASS and unit tests for them. The kernels are not used in this present PR, but are planned to be used in #4525.

The main contributions of this PR is the function cutlass_scaled_mm_dq:

• Supports symmetric quantized activations and weights
• The activations may be either per-tensor or per-token
• The weights may be either per-tensor or per output channel
• int8 is supported on Turing, Ampere, Lovelace, or Hopper
• fp8_e4m3 is supported on Ampere or Lovelace.
• Outputs can be either bfloat16 or fp16.

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[jeejeelee]

Great work~

Has the vllm community begun integrating Cutlass? Is this PR part of the official roadmap?

Additionally, For the integration of Cutlass, is it based on the python module(#4525) or the method outlined in your PR?

[tlrmchlsmth]

Thanks @jeejeelee -- this PR is part of a larger project to add support for w8a8 quantization (which is on the Q2 roadmap #3861). We ran into several issues with the Python interface in #4525, and it's really not supposed to be used this way, so we plan to replace the python cutlass code with these C++ kernels.

The main reason for using CUTLASS here is its ability to do operator fusion via its epilogue operations. For int8 quantization, especially in the asymmetric case, there are a variety of small operations that we'd like to fuse onto GEMMs to avoid the cost of sweeping over the outputs multiple times (see #3975).

[tlrmchlsmth]

@pcmoritz @comaniac There are a couple of issues to iron out still (CMakeLists changes and kernel dispatching for sure) but this should be ready to look at.

@youkaichao do you have any advice on how to handle the SM90a issues? (I know you were looking into this -- unfortunate that pytorch/pytorch@6e99f73 didn't make it into 2.3)

[jeejeelee]

Thank you for your patient explanation. May I ask another question?

Why isn't SM75 supported? We should be able to utilize the m8n8k16

[tlrmchlsmth]

Thank you for your patient explanation. May I ask another question?

Why isn't SM75 supported? We should be able to utilize the m8n8k16

I'll grab a T4 and see if I can get it working there

[tlrmchlsmth]

@jeejeelee I just added SM75 support as well. I didn't spent a ton of time tuning it but it's maybe 50% faster than fp16 GEMM

[pcmoritz]

Btw, while I was trying out this PR, I got the following error:

import torch
from vllm import _custom_ops as ops

A = torch.randn(8, 4096, dtype=torch.float16, device="cuda")
B = torch.randn(4096, 8192, dtype=torch.float16, device="cuda")

A *= 500
B *= 500

def per_tensor_quantize(tensor: torch.Tensor,
                       inv_scale: float) -> torch.Tensor:
   finfo = torch.finfo(torch.float8_e4m3fn)
   qweight = (tensor / inv_scale).clamp(min=finfo.min, max=finfo.max)
   return qweight.to(torch.float8_e4m3fn)

A_scale = 448.0 / A.abs().max()
B_scale = 448.0 / B.abs().max()

Aquant = per_tensor_quantize(A, 1.0 / A_scale)
Bquant = per_tensor_quantize(B, 1.0 / B_scale)

scale_a = A_scale * torch.ones((1, 1), device="cuda")
scale_b = B_scale * torch.ones((1, 1), device="cuda")

out = ops.cutlass_scaled_mm_dq(Aquant, Bquant, scale_a, scale_b, out_dtype=torch.float16)

out

I'm getting

RuntimeError: CUDA error: misaligned address
CUDA kernel errors might be asynchronously reported at some other API call, so the stacktrace below might be incorrect.
For debugging consider passing CUDA_LAUNCH_BLOCKING=1.
Compile with `TORCH_USE_CUDA_DSA` to enable device-side assertions.

Can you have a look if you know what is happening here?

[pcmoritz]

Ah, I think I know -- I didn't transpose B appropriately / it was not in column major order :)

Can you add a check in cutlass_scaled_mm_dq to make sure the dimensions are compatible and the matrices are in the right format?

Otherwise the PR looks good to me! Happy to stamp after the above comments are addressed :)

[tlrmchlsmth]

I'll add some asserts :)

[pcmoritz]

Thanks! We should also assert that the tensors are contiguous :)

[pcmoritz]

Thanks for the fixes, I have a few more comments!

As a mental picture, it should never be possible to crash the python interpreter from python code. Asserts in the C++ level should only be used for consistency checks with previously already established invariants, never for input validations :)

[pcmoritz]

Otherwise the PR looks good to me now :)

[tlrmchlsmth]

Should be ready now, thanks! @pcmoritz

[brisker]

@tlrmchlsmth
Any plan on w4a8 quantization support?

[shesung]

Is there some benchmark results for w8a8 speedup?

[MuYu-zhi]

@tlrmchlsmth hi, I'm invoking the cutlass_scaled_mm_dq kernel with enforce_eager=Falsemode, and raising an error,

[rank0]: File "/vllm/vllm/_custom_ops.py", line 189, in cutlass_scaled_mm_dq
[rank0]: vllm_ops.cutlass_scaled_mm_dq(out, a, b, a_scales, b_scales)
[rank0]: RuntimeError: CUDA error: operation not permitted when stream is capturing
[rank0]: Compile with TORCH_USE_CUDA_DSA to enable device-side assertions.

It seems the implementation of this kernel is not compatible with cuda graph.

Do you have any advice for this? 3q

[tlrmchlsmth]

Hey @shesung, if you are looking for end-to-end results for w8a8, we do use the CUTLASS kernels for the fp8 results here https://twitter.com/neuralmagic/status/1812863986330910816

[tlrmchlsmth]

@MuYu-zhi are you using the kernels from this PR directly? In that case, yes they did not initially support CUDA graphs. They were also completely untuned and slow in their initial version, so I'd recommend looking at the ones from vLLM main

[MuYu-zhi]

@tlrmchlsmth I pulled from vllm main, but not the latest main, it's version 0.4.2. Does the kernel have any updates after 0.4.2? If I want to support cuda graph by myself, how? I don't have extensive experience in cuda graph.

[robertgshaw2-neuralmagic]

@MuYu-zhi yes, you need to upgrade to a newer version of vllm

Is there a reason you need to use 0.4.2?

[MuYu-zhi]

@robertgshaw2-neuralmagic No specific reason, it's just that the latest version was 0.4.2 when I pulled it at that time. I'll try updating it. Thanks.