Boards: cyw20829: Added jlink as potential runner for board

- Add jlink as possible runner for cyw920829m2evk_02 platform in board.cmake file Signed-off-by: McAtee Maxwell (CSS ICW SW MTO INT 2) <maxwell.mcatee@infineon.com>
zephyrproject-rtos · Sep 25, 2024 · a4d9bb4 · a4d9bb4
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diff --git a/boards/infineon/cyw920829m2evk_02/board.cmake b/boards/infineon/cyw920829m2evk_02/board.cmake
@@ -2,3 +2,5 @@
 # SPDX-License-Identifier: Apache-2.0
 
 include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+board_runner_args(jlink "--device=CYW20829_tm")
+include (${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
diff --git a/boards/infineon/cyw920829m2evk_02/doc/index.rst b/boards/infineon/cyw920829m2evk_02/doc/index.rst
@@ -97,6 +97,11 @@ Programming and Debugging
 
 The CYW920829M2EVK-02 includes an onboard programmer/debugger (`KitProg3`_) to provide debugging, flash programming, and serial communication over USB. Flash and debug commands use OpenOCD and require a custom Infineon OpenOCD version, that supports KitProg3, to be installed.
 
+The CYW920829M2EVK-02 supports RTT via a SEGGER JLink device, under the target name cyw20829_tm. This can be enabled for an application by building with the rtt-console snippet or setting the following config values: CONFIG_UART_CONSOLE=n, CONFIG_RTT_CONSOLE=y, and CONFIG_USE_SEGGER_RTT=y.
+e.g. west build -p always -b cyw920829m2evk_02 samples/basic/blinky -S rtt-console
+
+As an additional note there is currently a discrepancy in RAM address between SEGGER and the CYW920829M2EVK-02 device. So, for RTT control block, do not use "Auto Detection". Instead, set the search range to something reflecting: RAM RangeStart at 0x20000000 and RAM RangeSize of 0x3d000.
+
 Infineon OpenOCD Installation
 =============================
 

diff --git a/soc/infineon/cat1b/cyw20829/Kconfig b/soc/infineon/cat1b/cyw20829/Kconfig
@@ -11,3 +11,4 @@ config SOC_SERIES_CYW20829
 	select CPU_CORTEX_M33
 	select CPU_HAS_FPU
 	select DYNAMIC_INTERRUPTS
+	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE