doc/zio: Documentation for zio

.gitlint

@@ -13,7 +13,7 @@ debug = false
 extra-path=scripts/gitlint
 
 [title-max-length-no-revert]
-line-length=72
+line-length=75
 
 [body-min-line-count]
 min-line-count=1

CMakeLists.txt

@@ -430,7 +430,7 @@ if(EXISTS ${CMAKE_BINARY_DIR}/zephyr_modules.txt)
     string(REGEX REPLACE "\"(.*)\":\".*\"" "\\1" module_name ${module})
     string(REGEX REPLACE "\".*\":\"(.*)\"" "\\1" module_path ${module})
     message("Including module: ${module_name} in path: ${module_path}")
-    add_subdirectory(${module_path} ${CMAKE_BINARY_DIR}/${module_name})
+    add_subdirectory(${module_path} ${CMAKE_BINARY_DIR}/modules/${module_name})
   endforeach()
 endif()
 

CODEOWNERS

@@ -115,6 +115,7 @@
 /drivers/dma/*sam0*                       @Sizurka
 /drivers/ethernet/                        @jukkar @tbursztyka @pfalcon
 /drivers/flash/                           @nashif
+/drivers/flash/*native_posix*             @vanwinkeljan
 /drivers/flash/*stm32*                    @superna9999
 /drivers/gpio/*ht16k33*                   @henrikbrixandersen
 /drivers/gpio/*stm32*                     @rsalveti @idlethread
@@ -158,6 +159,7 @@
 /drivers/*/*xec*                          @franciscomunoz @albertofloyd @scottwcpg
 /drivers/wifi/                            @jukkar @tbursztyka @pfalcon
 /drivers/wifi/eswifi/                     @loicpoulain
+/drivers/zio/                             @bfrog
 /dts/arm/atmel/samr21.dtsi                @benpicco
 /dts/arm/st/                              @erwango
 /dts/arm/ti/cc13?2*                       @bwitherspoon
@@ -179,11 +181,11 @@
 /dts/bindings/*/sifive*                   @mateusz-holenko @kgugala @pgielda @nategraff-sifive
 /dts/bindings/*/litex*                    @mateusz-holenko @kgugala @pgielda
 /dts/bindings/*/vexriscv*                 @mateusz-holenko @kgugala @pgielda
-/ext/fs/                                  @nashif @wentongwu
+/dts/posix/                               @aescolar @vanwinkeljan
 /ext/hal/atmel/asf/sam/include/same70*/   @aurel32
 /ext/hal/atmel/asf/sam0/include/samr21/   @benpicco
+/dts/bindings/sensor/*bme680*             @BoschSensortec
 /ext/hal/cmsis/                           @MaureenHelm @galak
-/ext/hal/libmetal/                        @galak
 /ext/hal/microchip/                       @franciscomunoz @albertofloyd @scottwcpg
 /ext/hal/nordic/                          @carlescufi @anangl
 /ext/hal/nxp/                             @MaureenHelm
@@ -220,6 +222,7 @@
 /include/drivers/loapic.h                 @andrewboie
 /include/drivers/mvic.h                   @andrewboie
 /include/drivers/pcie/                    @gnuless
+/include/drivers/zio/                     @bfrog
 /include/drivers/serial/uart_ns16550.h    @gnuless
 /include/dt-bindings/clock/kinetis_scg.h  @henrikbrixandersen
 /include/dt-bindings/pcie/                @gnuless
@@ -253,6 +256,8 @@
 /include/toolchain.h                      @andrewboie @andyross @nashif
 /include/toolchain/                       @andrewboie @andyross
 /include/zephyr.h                         @andrewboie @andyross
+/include/zio.h                            @bfrog
+/include/zio/                             @bfrog
 /kernel/                                  @andrewboie @andyross
 /lib/gui/                                 @vanwinkeljan
 /lib/libc/                                @nashif
@@ -261,6 +266,7 @@
 /lib/cmsis_rtos_v2/                       @nashif
 /lib/cmsis_rtos_v1/                       @nashif
 /lib/libc/                                @nashif @andrewboie
+/modules/                                 @nashif
 /kernel/device.c                          @andrewboie @andyross @nashif
 /kernel/idle.c                            @andrewboie @andyross @nashif
 /samples/                                 @nashif
@@ -285,6 +291,7 @@
 /samples/subsys/power/                    @wentongwu @pizi-nordic
 /scripts/coccicheck                       @himanshujha199640 @JuliaLawall
 /scripts/coccinelle/                      @himanshujha199640 @JuliaLawall
+/scripts/kconfig/                         @ulfalizer
 /scripts/elf_helper.py                    @andrewboie
 /scripts/sanity_chk/expr_parser.py        @nashif
 /scripts/gen_app_partitions.py            @andrewboie
@@ -310,6 +317,7 @@
 /subsys/fs/fcb/                           @nvlsianpu
 /subsys/fs/nvs/                           @Laczen
 /subsys/logging/                          @nordic-krch
+/subsys/mgmt/                             @carlescufi @nvlsianpu
 /subsys/net/buf.c                         @jukkar @jhedberg @tbursztyka @pfalcon
 /subsys/net/ip/                           @jukkar @tbursztyka @pfalcon
 /subsys/net/lib/                          @jukkar @tbursztyka @pfalcon
@@ -328,6 +336,7 @@
 /subsys/storage/                          @nvlsianpu
 /subsys/testsuite/                        @nashif
 /subsys/usb/                              @jfischer-phytec-iot @finikorg
+/subsys/zio/                              @bfrog
 /tests/                                   @nashif
 /tests/boards/native_posix/               @aescolar
 /tests/boards/intel_s1000_crb/            @dcpleung @sathishkuttan
@@ -351,6 +360,8 @@
 /tests/net/socket/                        @jukkar @tbursztyka @pfalcon
 /tests/subsys/fs/                         @nashif @wentongwu
 /tests/subsys/settings/                   @nvlsianpu
+/tests/subsys/shell/                      @jarz-nordic @nordic-krch
+/tests/subsys/zio/                        @bfrog
 
 # Get all docs reviewed
 *.rst                                     @dbkinder

Kconfig.zephyr

@@ -7,7 +7,12 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
+menu "Modules"
+
 source "$(CMAKE_BINARY_DIR)/Kconfig.modules"
+source "modules/Kconfig"
+
+endmenu
 
 # Include these first so that any properties (e.g. defaults) below can be
 # overriden in *.defconfig files (by defining symbols in multiple locations).
@@ -40,6 +45,7 @@ source "subsys/Kconfig"
 
 source "ext/Kconfig"
 
+
 menu "Build and Link Features"
 
 menu "Linker Options"

arch/arm/core/CMakeLists.txt

@@ -33,3 +33,4 @@ add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M cortex_m)
 add_subdirectory_ifdef(CONFIG_ARM_MPU cortex_m/mpu)
 add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M_HAS_CMSE cortex_m/cmse)
 add_subdirectory_ifdef(CONFIG_ARM_SECURE_FIRMWARE cortex_m/tz)
+add_subdirectory_ifdef(CONFIG_ARM_NONSECURE_FIRMWARE cortex_m/tz)

arch/arm/core/Kconfig

@@ -92,11 +92,19 @@ config ARM_NONSECURE_FIRMWARE
 	  resources of the Cortex-M MCU, and, therefore, it shall avoid
 	  accessing them.
 
-menu "ARM Secure Firmware Options"
-depends on ARM_SECURE_FIRMWARE
+
+menu "ARM TrustZone Options"
+depends on ARM_SECURE_FIRMWARE || ARM_NONSECURE_FIRMWARE
+
+comment "Secure firmware"
+	depends on ARM_SECURE_FIRMWARE
+
+comment "Non-secure firmware"
+	depends on !ARM_SECURE_FIRMWARE
 
 config ARM_FIRMWARE_HAS_SECURE_ENTRY_FUNCS
 	bool "Secure Firmware has Secure Entry functions"
+	depends on ARM_SECURE_FIRMWARE
 	help
 	  Option indicates that ARM Secure Firmware contains
 	  Secure Entry functions that may be called from
@@ -120,15 +128,24 @@ config ARM_NSC_REGION_BASE_ADDRESS
 	  a Non-Secure Callable section, depending on the available
 	  security attribution unit (SAU or IDAU) for a given SOC.
 
+config ARM_FIRMWARE_USES_SECURE_ENTRY_FUNCS
+	bool "Non-Secure Firmware uses Secure Entry functions"
+	depends on ARM_NONSECURE_FIRMWARE
+	help
+	  Option indicates that ARM Non-Secure Firmware uses Secure
+	  Entry functions provided by the Secure Firmware. The Secure
+	  Firmware must be configured to provide these functions.
+
 config ARM_ENTRY_VENEERS_LIB_NAME
 	string "Entry Veneers symbol file"
-	depends on ARM_FIRMWARE_HAS_SECURE_ENTRY_FUNCS
+	depends on ARM_FIRMWARE_HAS_SECURE_ENTRY_FUNCS \
+	        || ARM_FIRMWARE_USES_SECURE_ENTRY_FUNCS
 	default "libentryveneers.a"
 	help
-	  Library file to store the symbol table for
-	  the entry veneers. The library may be used
-	  for building a Non-Secure firmware with
-	  access to Secure Entry functions.
+	  Library file to find the symbol table for the entry veneers.
+	  The library will typically come from building the Secure
+	  Firmware that contains secure entry functions, and allows
+	  the Non-Secure Firmware to call into the Secure Firmware.
 
 endmenu
 

arch/arm/core/cortex_m/Kconfig

@@ -359,7 +359,7 @@ config SW_VECTOR_RELAY
 config PLATFORM_SPECIFIC_INIT
 	bool "Enable platform (SOC) specific startup hook"
 	help
-	  The platform specific initialization code (_PlatformInit) is executed
+	  The platform specific initialization code (z_platform_init) is executed
 	  at the beginning of the startup code (__start).
 
 endmenu

arch/arm/core/cortex_m/mpu/arm_core_mpu.c

@@ -9,7 +9,7 @@
 #include <kernel.h>
 #include <soc.h>
 
-#include <arch/arm/cortex_m/mpu/arm_core_mpu_dev.h>
+#include "arm_core_mpu_dev.h"
 #include <linker/linker-defs.h>
 
 #define LOG_LEVEL CONFIG_MPU_LOG_LEVEL

include/arch/arm/cortex_m/mpu/arm_core_mpu_dev.h → arch/arm/core/cortex_m/mpu/arm_core_mpu_dev.h

@@ -106,16 +106,6 @@ struct k_thread;
  * ARM_MPU support.
  */
 
-/**
- * @brief enable the MPU
- */
-void arm_core_mpu_enable(void);
-
-/**
- * @brief disable the MPU
- */
-void arm_core_mpu_disable(void);
-
 /**
  * @brief configure a set of fixed (static) MPU regions
  *

arch/arm/core/cortex_m/mpu/arm_mpu.c

@@ -8,7 +8,7 @@
 #include <init.h>
 #include <kernel.h>
 #include <soc.h>
-#include <arch/arm/cortex_m/mpu/arm_core_mpu_dev.h>
+#include "arm_core_mpu_dev.h"
 #include <arch/arm/cortex_m/mpu/arm_core_mpu.h>
 #include <linker/linker-defs.h>
 

arch/arm/core/cortex_m/mpu/nxp_mpu.c

@@ -8,7 +8,7 @@
 #include <init.h>
 #include <kernel.h>
 #include <soc.h>
-#include <arch/arm/cortex_m/mpu/arm_core_mpu_dev.h>
+#include "arm_core_mpu_dev.h"
 #include <arch/arm/cortex_m/mpu/arm_core_mpu.h>
 #include <misc/__assert.h>
 #include <linker/linker-defs.h>

arch/arm/core/cortex_m/reset.S

@@ -22,7 +22,7 @@ GTEXT(__reset)
 GTEXT(memset)
 GDATA(_interrupt_stack)
 #if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
-GTEXT(_PlatformInit)
+GTEXT(z_platform_init)
 #endif
 
 /**
@@ -59,7 +59,7 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__reset)
 SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
 
 #if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
-    bl _PlatformInit
+    bl z_platform_init
 #endif
 
     /* lock interrupts: will get unlocked when switch to main task */

arch/arm/core/cortex_m/tz/CMakeLists.txt

@@ -2,22 +2,34 @@
 
 # '-mcmse' enables the generation of code for the Secure state of the ARMv8-M
 # Security Extensions. This option is required when building a Secure firmware.
-zephyr_compile_options(-mcmse)
+zephyr_compile_options_ifdef(CONFIG_ARM_SECURE_FIRMWARE -mcmse)
 
 if(CONFIG_ARM_FIRMWARE_HAS_SECURE_ENTRY_FUNCS)
 
-# --out-implib and --cmse-implib instruct the linker to produce
-# an import library that consists of a relocatable file containing
-# only a symbol table with the entry veneers. The library may be used
-# when building a Non-Secure image which shall have access to Secure
-# Entry functions.
+  # --out-implib and --cmse-implib instruct the linker to produce
+  # an import library that consists of a relocatable file containing
+  # only a symbol table with the entry veneers. The library may be used
+  # when building a Non-Secure image which shall have access to Secure
+  # Entry functions.
   zephyr_ld_options(
-    ${LINKERFLAGPREFIX},--out-implib=${CONFIG_ARM_ENTRY_VENEERS_LIB_NAME}
+    ${LINKERFLAGPREFIX},--out-implib=${CMAKE_BINARY_DIR}/${CONFIG_ARM_ENTRY_VENEERS_LIB_NAME}
   )
 
   zephyr_ld_options(
     ${LINKERFLAGPREFIX},--cmse-implib
   )
+
+  # Indicate that the entry veneers library file is created during linking of this firmware.
+  set_property(
+    GLOBAL APPEND PROPERTY
+    extra_post_build_byproducts
+    ${CMAKE_BINARY_DIR}/${CONFIG_ARM_ENTRY_VENEERS_LIB_NAME}
+    )
 endif()
 
-zephyr_sources(arm_core_tz.c)
+# Link the entry veneers library file with the Non-Secure Firmware that needs it.
+zephyr_link_libraries_ifdef(CONFIG_ARM_FIRMWARE_USES_SECURE_ENTRY_FUNCS
+  ${CMAKE_BINARY_DIR}/${CONFIG_ARM_ENTRY_VENEERS_LIB_NAME}
+  )
+
+zephyr_sources_ifdef(CONFIG_ARM_SECURE_FIRMWARE arm_core_tz.c)

arch/arm/include/cortex_m/stack.h

@@ -39,14 +39,8 @@ extern K_THREAD_STACK_DEFINE(_interrupt_stack, CONFIG_ISR_STACK_SIZE);
  */
 static ALWAYS_INLINE void z_InterruptStackSetup(void)
 {
-#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT) && \
-	defined(CONFIG_USERSPACE)
-	u32_t msp = (u32_t)(Z_THREAD_STACK_BUFFER(_interrupt_stack) +
-			    CONFIG_ISR_STACK_SIZE - MPU_GUARD_ALIGN_AND_SIZE);
-#else
-	u32_t msp = (u32_t)(Z_THREAD_STACK_BUFFER(_interrupt_stack) +
-			    CONFIG_ISR_STACK_SIZE);
-#endif
+	u32_t msp = (u32_t)(Z_THREAD_STACK_BUFFER(_interrupt_stack)) +
+			    K_THREAD_STACK_SIZEOF(_interrupt_stack);
 
 	__set_MSP(msp);
 #if defined(CONFIG_BUILTIN_STACK_GUARD)

arch/arm/include/kernel_arch_func.h

@@ -74,15 +74,9 @@ z_arch_switch_to_main_thread(struct k_thread *main_thread,
 	/* get high address of the stack, i.e. its start (stack grows down) */
 	char *start_of_main_stack;
 
-#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT) && \
-	defined(CONFIG_USERSPACE)
-	start_of_main_stack =
-		Z_THREAD_STACK_BUFFER(main_stack) + main_stack_size -
-		MPU_GUARD_ALIGN_AND_SIZE;
-#else
 	start_of_main_stack =
 		Z_THREAD_STACK_BUFFER(main_stack) + main_stack_size;
-#endif
+
 	start_of_main_stack = (char *)STACK_ROUND_DOWN(start_of_main_stack);
 
 #ifdef CONFIG_TRACING

boards/arm/96b_nitrogen/96b_nitrogen.dts

@@ -97,15 +97,15 @@
 
 		boot_partition: partition@0 {
 			label = "mcuboot";
-			reg = <0x00000000 0x8000>;
+			reg = <0x00000000 0xa000>;
 		};
-		slot0_partition: partition@8000 {
+		slot0_partition: partition@a000 {
 			label = "image-0";
-			reg = <0x00008000 0x34000>;
+			reg = <0x0000a000 0x33000>;
 		};
-		slot1_partition: partition@3c000 {
+		slot1_partition: partition@3d000 {
 			label = "image-1";
-			reg = <0x0003c000 0x34000>;
+			reg = <0x0003d000 0x33000>;
 		};
 		scratch_partition: partition@70000 {
 			label = "image-scratch";

boards/arm/cc1352r1_launchxl/Kconfig.defconfig

@@ -9,4 +9,11 @@ if BOARD_CC1352R1_LAUNCHXL
 config BOARD
 	default "cc1352r1_launchxl"
 
+if SPI
+
+config SPI_0
+	default y
+
+endif # SPI
+
 endif # BOARD_CC1352R1_LAUNCHXL

boards/arm/cc1352r1_launchxl/cc1352r1_launchxl.dts

@@ -73,3 +73,12 @@
 	scl-pin = <4>;
 	sda-pin = <5>;
 };
+
+&spi0 {
+	status = "ok";
+	sck-pin = <10>;
+	mosi-pin = <9>;
+	miso-pin = <8>;
+	cs-pin = <11>;
+	cs-gpios = <&gpio0 11 0>;
+};

boards/arm/cc1352r1_launchxl/cc1352r1_launchxl.yaml

@@ -11,3 +11,4 @@ toolchain:
 supported:
   - gpio
   - i2c
+  - spi

boards/arm/cc1352r1_launchxl/cc1352r1_launchxl_defconfig

@@ -10,6 +10,10 @@ CONFIG_SOC_CC1352R=y
 CONFIG_CORTEX_M_SYSTICK=y
 CONFIG_BOARD_CC1352R1_LAUNCHXL=y
 
+CONFIG_CC13X2_CC26X2_BOOTLOADER_ENABLE=y
+CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_ENABLE=y
+CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_PIN=15
+
 CONFIG_PINMUX=y
 CONFIG_GPIO=y
 CONFIG_SERIAL=y