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[Feature Request] Add syntax highlighting and code folding for SystemVerilog language (.sv, .svh) #474

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brooke-yucx opened this issue Jul 21, 2022 · 2 comments

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@brooke-yucx
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This is probably the most popular language for hardware designers and it is a super set of Verilog HDL language. Could you add the support? Really thank you. 😀

@zufuliu
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zufuliu commented Jul 21, 2022

Yes, VHDL 2008 and SystemVerilog 2012 will be supported in next release. people with access to IEEE can provide PDF documents for newer standards.

@zufuliu
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zufuliu commented Aug 15, 2022

Verilog 2005 and SystemVerilog 2012 implemented by 4c5433f, feel free to test latest builds.

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