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Enable FPGA-based SPI testing on Silicon Labs targets #11008

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Jul 15, 2019
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10 changes: 9 additions & 1 deletion targets/TARGET_Silicon_Labs/TARGET_EFM32/spi_api.c
Original file line number Diff line number Diff line change
Expand Up @@ -274,6 +274,12 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName clk, PinName cs)
spi_enable(obj, true);
}

void spi_free(spi_t *obj)
{
spi_enable(obj, false);
USART_Reset(obj->spi.spi);
}

void spi_enable_event(spi_t *obj, uint32_t event, uint8_t enable)
{
if(enable) obj->spi.event |= event;
Expand Down Expand Up @@ -1434,7 +1440,9 @@ const PinMap *spi_master_miso_pinmap()

const PinMap *spi_master_clk_pinmap()
{
return PinMap_SPI_CLK;
// We don't currently support hardware CS in master mode.
static const PinMap PinMap_SPI_CLK_mod[] = {NC , NC , NC};
return PinMap_SPI_CLK_mod;
}

const PinMap *spi_master_cs_pinmap()
Expand Down