STM32H7 FLASH API issue with M4 core

[jeromecoutant]

Description (required)

Compilation is failing for DISCO_H747I_CM4

Summary of change (What the change is for and why)

SCB cache functions are only available for M7 core, not M4

Documentation (Details of any document updates required)

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Pull request type (required)

[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

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Test results (required)

[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

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Reviewers (optional)

@0xc0170 why CI didn't catch the issue before ?

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Release Notes (required for feature/major PRs)

Summary of changes

Impact of changes

Migration actions required

[0xc0170]

@0xc0170 why CI didn't catch the issue before ?

Checking

[0xc0170]

@jeromecoutant How to reproduce? I don't see build problem in nightly (latest run here http://mbed-os-ci.s3-website-eu-west-1.amazonaws.com/?prefix=jenkins-ci/ARMmbed/mbed-os/mbed-os-ci-nightly/artifacts/master/393/ ). What are we missing?

[0xc0170]

One additional question: @jeromecoutant why the target does not have release_version defined ?

[jeromecoutant]

One additional question: @jeromecoutant why the target does not have release_version defined ?

It could be changed.
It was because the M4 target of this dual core CPU is not accessible via drag and drop feature.

[mbed-ci]

Test run: SUCCESS

Summary: 11 of 11 test jobs passed
Build number : 1
Build artifacts

[0xc0170]

It was because the M4 target of this dual core CPU is not accessible via drag and drop feature.

So should stay that way rather. Just can't have it tested, need to be checked manually (enable, test). 🙄

[0xc0170]

@jeromecoutant I merged this to fix the build but still we shall review how to build this

[adbridge]

This is sitting on top of #11789 which is currently targeting 6.0

[jeromecoutant]

This is sitting on top of #11789 which is currently targeting 6.0

This PR solves some compilation issue from #11619
(only M4 core side, not the main core)

@JanneKiiskila

[JanneKiiskila]

This part does not look right? We're anyway always doing the same thing?

[JanneKiiskila]

Either there should be "something else" in the #else part or these should not be any #ifdef magic here.

[jeromecoutant]

SCB_CleanInvalidateDCache_by_Addr only exist for M7 core.

• for H743: DUAL_CORE is not defined
• for H747: DUAL_CORE is defined, then core side is checked