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Github repo containing all the VHDL files for the EE224 course project involving designing a rudimentary CPU.

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IITB-CPU

Course Instructor :- Prof. Virendra Singh

Team members :-

IITB-CPU is a 16-bit elementary computer developed for teaching that is based on the Little Computer Architecture. The IITB-CPU is an 8-register, 16-bit computer system. It has 8 general-purpose registers (R0 to R7). Register R7 always stores Program Counter (also known as the Instruction Pointer). PC points to the next instruction. All addresses are short word addresses (i.e. address 0 corresponds to the first two bytes of main memory, address 1 corresponds to the second two bytes of main memory, etc.). This architecture uses a condition code register which has two flags Carry flag(C) and Zero flag(Z). The IITB-CPU is very simple, but it is general enough to solve complex problems. The architecture allows predicated instruction execution and multiple load and store execution. There are three machine-code instruction formats (R, I, and J type) and a total of 14 instructions.

Entities designed for implementing the CPU:

  • Arithmetic Logic Unit(ALU): As the name suggests, it performs various arithmetic operations on operands, such as addition, NAND and XOR.

  • Memory unit: Stores the program (sequential set of instructions) to be uploaded to the CPU.

  • Sign extenders (SE6, SE9): The sign extenders pad a specified number of zeroes to the most significant or least significant part of the binary numbers.

  • Temporary registers: These registers help store variables while processing the instructions. As is evident, they all store 16-bit binary values.

  • Register file: It is essentially a collection of registers (which store data and addresses), and can be controlled by an enable input.

N.B. : The reader is advised to exercise caution while using the code as a reference. Although the fundamental idea behind the code is more or less correct, we were unable to verify the correctness of the code for various instructions through testing and verification. Constructive suggestions regarding any change in the code are most welcome, and can be mailed here.

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Github repo containing all the VHDL files for the EE224 course project involving designing a rudimentary CPU.

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