MMIO Project Task
MMIO stands for memory-mapped input-output, so the name explains the concept – it’s a digital subsystem that allows interacting with devices by using Ld and St instructions. It pretends the devices are in the memory, but they're actually not. That is just a convenient way to write code to interact with them.
Note that when you read Berkeley docs, they have a habit of disregarding the value of names, and often make unfortunate choices for names that cause confusion. "Widget" is one of these cases. Old Berkeley docs used "widget" in the context of FireSim to refer to RTL that is added to FPGA in order to connect the device under test to the FireSim main simulation loop running on the Host. Then, Berkeley also used the same word "widget" as a generic term for MMIO peripheral, digital subsystem, and circuit in the RISCV/Chisel/Rocket-chip/chipyard/UC Berkeley documents. We will refer to such things by their actual name. If we need to refer to the class of things that one puts on an SoC, we use the term "SoC subsystem" or "component".
To add a new MMIO peripheral we need to deal with three files:
- the file we are going to actually work on ==> for this example let’s call it
JustRead.scala. DigitalTop.scalaRocketConfig.scala
The latter two files serve to plug what we create in the former file to the rest of the Rocket-chip, namely, in the two latter files we’ll just copy/paste and edit a few lines, whereas this write-up focuses on the first file = that’s where this whole project actually lives.
Testing consists of two phases:
- First, we need to create a simulator. Managing to do that, we have confirmed that
- our Chisel is syntactically correct,
- the circuit makes sense (it’s feasible as a digital system),
- the peripheral is correctly interconnected with the rest of the SoC
- the whole SoC is successfully translated to Verilog and Verilog again to C++
- next, we need a program, a piece of software that we will write in either C or RISCV assembly and compile and run bare metal, i.e. directly on the simulator we created
Our task is to design a circuit that responds to the CPU with the value 230 (unsigned integer), when the CPU performs a Ld on the address 0x2000. Here's an overview of what's to be done:
- We write RTL of the circuit that responds with the value 230.
- Wrap that RTL into Chisel code for TileLink and Cake Pattern, i.e. we leverage a TL node type that automatically adds the MMIO logic, which is the logic that recognizes the address produced by the CPU and routes that to the RTL we attached via TL.
- Get familiar with the rocket-chip infrastructure for generating a verilog file and simulator that with Verilator, and have the simulator run a C program bare metal.
- Write and compile a C program that loads from address 0x2000 and prints the value received, called JustRead.
- Run that program in the simulation environment