-
Notifications
You must be signed in to change notification settings - Fork 17
Parameters and Keys
Create a new text file in location:
p-chipyard/generators/chipyard/src/main/scala/example
and call it JustRead.scala
. Open it (we recommend using Sublime) and type these lines:
package chipyard.example
import chisel3._
import chisel3.util._
import chisel3.experimental.{IntParam, BaseModule}
import freechips.rocketchip.subsystem.BaseSubsystem
import freechips.rocketchip.config.{Parameters, Field, Config}
import freechips.rocketchip.diplomacy._
import freechips.rocketchip.regmapper.{HasRegMap, RegField}
import freechips.rocketchip.tilelink._
import freechips.rocketchip.util.UintIsOneOf
The first one tells that this file will be part of the chipyard.example
package, whereas the rest just import a bunch of Chisel/Diplomacy/TileLink/RocketChip stuff. Any discussion on those topics is beyond this write-up, but here you can find some really good documentation on all of them.
First, we need the case class with a name forged from the name of our project suffixed by Params
(sometimes it’s suffixed with Config
, instead). In our simplest of designs let’s have just two parameters: the offset address where the memory mapping starts (address
) and the width of the data our processor will be just reading (width
). Here’s how we do that:
case class JustReadParams(
address: BigInt = 0x2000,
width: Int = 32)
both of these default values are pretty much arbitrary, so feel free to play around with them later on.
The second thing is the Key
– again we suffix the Key
to the name of the project and do this:
case object JustReadKey extends Field[Option[JustReadParams]](None)