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stm32: h7 spi support reload mode & frequency #6801

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nefelim4ag
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Currently, there is an issue with spi bus frequency and possibly mode.
If several different devices are present on the bus because of the logical OR gate on CFG registers, mode and div will be merged.
So, if they share mode speed will be lower, in my specific case 4Mhz TMC (MBR 6) + 10Mhz encoder (MBR 5), causes div to be 6|5 = 7.

So, this is a simple fix to allow a proper reload of CFG registers.
STM32H7 (at 480Mhz) so expected frequencies:

  • 480_000_000 >> (5 + 1) = 7500000
  • 480_000_000 >> (6 + 1) = 3750000

There are oscilloscope probes, while both are running:
image
image

Thanks.

@KevinOConnor
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@adelyser - FYI.

-Kevin

Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
@nefelim4ag nefelim4ag force-pushed the stm32h7-hw-spi-fixes branch from 79dc0b6 to 2e96b4f Compare January 31, 2025 04:06
@D4SK
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D4SK commented Jan 31, 2025

Are the stm32h7 chips now running at 480mhz? Used to be set at 400, but maybe I missed this

@nefelim4ag
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@D4SK, don't worry, mainline Klipper still runs on 400Mhz.
480 Mhz is just my local modifications, where I tried to push the platform to its limits.
I just pointed it out to show that frequencies are different from mainline ones (3.125Mhz and 6.25Mhz accordingly) to avoid confusion (and I just try to avoid reflashing it too frequently).

If that matters, a small topic on the discourse about going higher.

@KevinOConnor
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Thanks. If there are no further comments I'll look to commit this in a few days.

-Kevin

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3 participants