Generalize cmovs and partial loads via MIPSInstr::mask #397
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pavelkryukov
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Add traps on aligned addresses for lw, lwu, lh, lhu instructions
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0x402494: or $v1, $zero, $zero [ $v1 = 0x0 ]
0x402498: lwl $v1, 0x1($v0) [ $v1 = 0x4030201]
$v1 = 4000000
0x40249c: lui $at, 0x100 [ $at = 0x1000000 ]
0x4024a0: bne $v1, $at, 285
Tests do not pass. For example, in this test $v1 = 0x4000000 instead of 0x1000000
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OK. I'll merge that code as it does not break LWR and other instructions, and you will fix LWR afterwards. |
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My intuition is that we have to add or subtract 3 to during LWL address calculation. |
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Add traps on aligned addresses for lw, lwu, lh, lhu instructions