Scope #91

cindy-q · 2023-10-02T22:14:16Z

Documentation WIP

…ce, microseq unpause, external debouncer

…rence. Makefile change to generate devicetree with overlay. Added a generic UIO interrupt overlay for the dma_rx core. Added blank overlays for the other projects to accomodate the Makefile change

…he updated project naming scheme

…he scope project.

- new opcode LITR - halt and litr interrupt added - simulation test to validate litr, halt, and pause.

…ut. still need to add 4 channels, update rx tx, and add new board for 4-input RP

… with two more optional input pins

…ontrol

… will revisit again once the rx and tx chain has been updated. addex fix on core generation to also include systemverilog files

- added manual spi write to the dac. - added phase offset to the pll_adc to offset internal routing through the fpga. - script modified to look for sv files.

…trol and pattern validation logic added for manual tuning

…ntrolled)

… event interrupt. added device id and device version. gradient scope expanded to four channels.

…oint

…all the external trigger stop for any unexpected reason.

… only to rising edges

…only to rising edges

…h on Z10 PL.

cindy-q and others added 30 commits September 29, 2023 16:44

receiver to datamover core added

22ca353

bd changes. still need to add axi sniffer, add external clock interfa…

e588c38

…ce, microseq unpause, external debouncer

sniffer

1431bc4

added all things. need testing

0f18e8e

removing scope from rp 125_14

6b30daf

Renamed interrupt pin on dma_rx core to avoid vivado's interrupt infe…

6921711

…rence. Makefile change to generate devicetree with overlay. Added a generic UIO interrupt overlay for the dma_rx core. Added blank overlays for the other projects to accomodate the Makefile change

update on devicetree script such that the firmware name will follow t…

631de96

…he updated project naming scheme

oops.. forgot to change this one

c19a698

Added an example data transfer project. Fix to DDR address range on t…

64d9658

…he scope project.

micro-sequencer:

c13aca7

- new opcode LITR - halt and litr interrupt added - simulation test to validate litr, halt, and pause.

adding the interrupt connections to the PS

bfd56c1

Merge branch 'OpenMRI:main' into feature/scope

19d0353

Merge branch 'main' into feature/scope

4e5c86c

Merge branch 'main' into feature/scope

2d52d86

adding sata (s1) input clock, and trigger io moved to the sata s2 inp…

4cf0fed

…ut. still need to add 4 channels, update rx tx, and add new board for 4-input RP

removing the external clock board. it is similar enough to regular RP…

0fdb0cd

… with two more optional input pins

syncing rx2 to the latest main. thomas' branch is still incoming

5dcc784

rp 125 14 4 input board files

ad1335a

more board updates

709bc8b

adding 4ch support. still need to add SPI configuration and the AXI c…

f4c88b5

…ontrol

more things

72a7368

trigger

9b5a583

reducing rx channel to only 3 as space utilization has been exceeded.…

00b068e

… will revisit again once the rx and tx chain has been updated. addex fix on core generation to also include systemverilog files

- add test pattern validation on the ddr core.

676b67c

- added manual spi write to the dac. - added phase offset to the pll_adc to offset internal routing through the fpga. - script modified to look for sv files.

address mapping updated from ocra-mri. connected manual spi write con…

5b1cf09

…trol and pattern validation logic added for manual tuning

adding modulation option. fix on net typo

234a13d

zynq ddr transfer test added

4d64081

more files

a95f1b3

irq

91166fc

splitting project to advanced (useq controlled), and simple (width co…

2495458

…ntrolled)

cindy-q added 22 commits May 1, 2024 13:50

bugfix on triggering capture at the falling edge of the trigger

e818357

state readback fix

1a094a8

adding state register read

ea3e2b1

dma aggregate read on top level status register

846afd6

2ch adc

ec07efe

rx acquisition with timestamp

d5cf6d8

microsequencer additions. rx acquisition core. 2ch adc bugfix.

46f534d

axi write core

68afd6a

microsequencer v1.1\

7135e41

microsequencer to start on external trigger

60a475a

irq uio update

cf739f3

Merge branch 'main' into feature/scope

4e2af4e

reduced data event interrupt to one bit. add polling support for data…

7108771

… event interrupt. added device id and device version. gradient scope expanded to four channels.

resizing transmit bram. z10 rf scope is practically full after this p…

cacf89b

…oint

address change for tx

71a5a96

adding internal trigger. this is to safely stop the microsequencer sh…

6826b4b

…all the external trigger stop for any unexpected reason.

acq_trigger core: updated register map info and make gating sensitive…

e4ce752

… only to rising edges

rx_trigger core: updated register map info and make gating sensitive …

5407ce8

…only to rising edges

bugfix on aggregate rx irq logic

7105a46

Changing implementation strategy. Scope RF project utilization is hig…

95fb5d7

…h on Z10 PL.

oops

40818ac

cli tool to read and write PL registers

65844bd

cindy-q changed the base branch from main to main-next June 20, 2024 20:08

cindy-q added 7 commits June 20, 2024 13:21

fixed address cells and size cells to 1

339addd

updating reg_rw gitignore

6f36244

buffer select on fpga

4de5d74

moved trigger to sata s2 port a. version bump at 0x3

cb74cc2

ooops.. forgot to change the IO on the RF scope

660887b

adding queued axi write to the scope project

d4b6d08

oops

3ca38f1

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Scope #91

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cindy-q commented Oct 2, 2023 •

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Scope #91

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