Digital-Soc-Design

Day 1

The LAB for day 1 gives the complete flow about using the SKYWATER 130nm PDK, Openlane EDA

Open the working Directory

  cd Desktop
  cd work/tools
  cd openlane_working_dir
  cd openlane

To open the Openlane

After getting into the directory, enter the commands

  docker
  pwd
  ls -ltr

To open the openlane in interactive mode,

 ./flow.tcl -interactive

To prepare the openlane,

  package require openlane 0.9
  prep - design picorv32a

Synthesis

To run the Synthesis

 run_synthesis

-> After Synthesis is completed, the message is shown that the "Synthesis was successful"

-> This contains all the details about the synthesis of the picorv32a

• The Chip Area of the module 147712.918400

• Number of cells: 14876

• Number of FF: 1613

-> Particularly we are interested in finding the Flop ratio. This can be calculated by using the formula:

         Flop ratio in (%) = Total No of D-FF
                           --------------------  X 100
                            Total No of Cells

                          = 1613
                          --------   X 100
                            14876 

                          = 10.8429685

Synthesis Report

The Synthesis Report are found in the directory

   ~/Desktop/work/tools/openlane_working_dir/openlane/designs/picorv32a/runs/29-03_15-37/reports/synthesis/1-yosys_4.stat.rpt

The synthesis Results are found in the directory

   ~/Desktop/work/tools/openlane_working_dir/openlane/designs/picorv32a/runs/29-03_15-37/results/synthesis/picorv32a.synthesis.v

Day 2

Floorplanning

The LAB for day 2 gives the complete flow of the Floorplanning and the placement process

After the Synthesis process, type the command for running the Floor planning

The configuration files are inside the location

  /Desktop/work/tools/openlane_working_dir/openlane/configurations/README.md

To run floorplan

  run_floorplan

we will be getting a success message like this

In this particular location from the floorplan.def file, we can able to see the area of the chip

         1000 unit distance = 1 Micron

         Distance in micron = value
                            ----------
                               1000

        Die width in micron = 660685 
                             ---------
                               1000
                            
       Die height in micron =  671405 
                              ---------
                                1000

      Area of die in micron = 660.685*671.405 Square micron 

Open this directory to initiate the Magic Tool

Locate to this directory

  ~/Desktop/work/tools/openlane_working_dir/openlane/designs/picorv32a/runs/29-03_15-37/results/floorplan

 magic -T /home/vsduser/Desktop/work/tools/openlane_working_dir/pdks/sky130A/libs.tech/magic/sky130A.tech lef read ../../tmp/merged.lef def read picorv32a.floorplan.def &

• Floorplan def in Magic

• Horizontal metal layer

• Vertical metal layer

• Standard cells

Placement

To run the Placement, the command is

    run_placement

Commands to load placement def in magic

    magic -T /home/vsduser/Desktop/work/tools/openlane_working_dir/pdks/sky130A/libs.tech/magic/sky130A.tech lef read ../../tmp/merged.lef def read picorv32a.placement.def &

• Floorplan def in magic

• Standard cell placement

Day 3

The LAB for the day gives the complete flow of the Inverter simulation using ngspice and Magic EDA tool

Go to this directory to git clone the files

  /Desktop/work/tools/openlane_working_dir/openlane

Git clone the files from GitHub to your local pc

  git clone https://github.com/nickson-jose/vsdstdcelldesign.git

open another terminal and go to the location

  /home/vsduser/Desktop/work/tools/openlane_working_dir/pdks/sky130A/libs.tech/magic

copy the sky130A.tech file from this location to the git cloned location.

Now initialize magic

  magic -T sky130A.tech sky130_inv.mag &

• Inverter layout

• Nmos

• Pmos

• Connection between source and VDD in Pmos

• Connection between source and Ground in Nmos

Now open the tkcon window and type the commands for extracting the files

  pwd
  extract all

  ext2spice cthresh 0 rthresh 0
  ext2spice  

Spice Simulation

Now in the git cloned location, we can able to see the sky130_inv.spice file

To install ngspice, use the commands in the terminal

  sudo apt -y install ngspice

Then run the spice file in ngspice

  ngspice sky130_inv.spice

Spice Output

To plot the graph between Voltage and time type the command in ngspice

  plot y vs time a

• Transient response output V = 3.3v
  80% of V is 2.64v
  20% of V is 0.65v
• 80% value
• 
• 20% value
• 

Rise transition time = Time taken for output to rise from 80% - Time taken for output to rise from 20%

                 = 2.4577 ns - 2.182 ns
                 =  0.06377 ns

• 20% value
• 
• 80% value
• 

Fall transition time = Time taken for output to fall from 20% - Time taken for output to fall from 80%

                 = 4.09511 ns - 4.05263 ns
                 =  0.04248 ns

V = 3.3v
50% of V is 1.65v

Rise propagation delay = Time taken for output to rise to 50% - Time taken for input to fall to 50%

                 = 2.2113 ns - 2.15 ns
                 =  0.0613 ns

Fall propagation delay = Time taken for output to fall to 50% - Time taken for input to rise to 50%

                 = 4.07806 ns - 4.05056 ns
                 =  0.0275 ns